Data Sheet
ICM-20948
Document Number: DS-000189 Page 54 of 89
Revision: 1.3
8.62 FIFO_R_W
Name: FIFO_R_W
Address: 114 (72h)
Type: USR0
Bank: 0
Serial IF: R/W
Reset Value: 0x00
BIT
NAME
FUNCTION
7:0
FIFO_R_W[7:0]
Reading from or writing to this register actually reads/writes the FIFO. For example,
to write a byte to the FIFO, write the desired byte value to FIFO_R_W[7:0]. To read a
byte from the FIFO, perform a register read operation and access the result in
FIFO_R_W[7:0].
8.63 DATA_RDY_STATUS
Name: DATA_RDY_STATUS
Address: 116 (74h)
Type: USR0
Bank: 0
Serial IF: R/C
Reset Value: 0x00
BIT NAME FUNCTION
7
WOF_STATUS
Wake on FSYNC interrupt status. Cleared on read.
6:4
-
Reserved.
3:0
RAW_DATA_RDY[3:0]
Data from sensors is copied to FIFO or SRAM.
Set when sequence controller kicks off on a sensor data load. Only bit 0 is relevant in
a single FIFO configuration. Cleared on read.
8.64 FIFO_CFG
Name: FIFO_CFG
Address: 118 (76h)
Type: USR0
Bank: 0
Serial IF: R/W
Reset Value: 0x00
BIT
NAME
FUNCTION
7:1
-
Reserved.
0
FIFO_CFG
This bit should be set to 1 if interrupt status for each sensor is required.
8.65 REG_BANK_SEL
Name: REG_BANK_SEL
Address: 127 (7Fh)
Type: ALL
Bank: 0
Serial IF: R/W
Reset Value: 0x00
BIT
NAME
FUNCTION
7:6
-
Reserved.
5:4
USER_BANK[1:0]
Use the following values in this bit-field to select a USER BANK.
0: Select USER BANK 0.
1: Select USER BANK 1.
2: Select USER BANK 2.
3: Select USER BANK 3.
3:0
-
Reserved.