User Manual

6
Figure 1. Timing Diagrams
Start
Condition
Stop
Condition
P
SDA
t
t
HD;DAT
t
BUF
V
IH
V
IL
SCL
t
SU;STA
t
HIGH
t
f
t
r
t
HD;STA
t
LOW
V
IH
V
IL
SP S
SU;DAT
t
SU;STO
IR LED Characteristics, V
DD
= 3 V, T
A
= 25 °C (unless otherwise noted)
Parameter Min Typ Max Units Test Conditions
Peak Wavelength, λ
P
950 nm I
F
= 20 mA
Spectrum Width, Half Power, Δλ 30 nm I
F
= 20 mA
Optical Rise Time, T
R
20 ns I
F
= 100 mA
Optical Fall Time, T
F
20 ns I
F
= 100 mA
Wait Characteristics, V
DD
= 3 V, T
A
= 25 °C, WEN = 1 (unless otherwise noted)
Parameter Min Typ Max Units Test Conditions
Wait Step Size 2.78 ms W
TIME
= 0×FF
AC Electrical Characteristics, V
DD
= 3 V, T
A
= 25 °C (unless otherwise noted)
*
Parameter Symbol Min. Max. Unit
Clock frequency (I
2
C-bus only) f
SCL
0 400 kHz
Bus free time between a STOP and START condition t
BUF
1.3 – µs
Hold time (repeated) START condition. After this period, the rst clock pulse
is generated
t
HDSTA
0.6 – µs
Set-up time for a repeated START condition t
SU;STA
0.6 – µs
Set-up time for STOP condition t
SU;STO
0.6 – µs
Data hold time t
HD;DAT
30 – ns
Data set-up time t
SU;DAT
100 – ns
LOW period of the SCL clock t
LOW
1.3 – µs
HIGH period of the SCL clock t
HIGH
0.6 – µs
Clock/data fall time t
f
20 300 ns
Clock/data rise time t
r
20 300 ns
Input pin capacitance C
i
– 10 pF
* Specied by design and characterization; not production tested.