User Manual

33
Gesture Status Register (0xAF)
The GSTATUS Register indicates the operational condition of the gesture state machine.
Field Bits Description
RESERVED 7:2 Do not care.
GFOV 1 Gesture FIFO Overow. A setting of 1 indicates that the FIFO has lled to capacity and that new
gesture detector data has been lost.
GVALID 0 Gesture FIFO Data. GVALID bit is sent when GFLVL becomes greater than GFIFOTH (i.e. FIFO has
enough data to set GINT). GFIFOD is reset when GMODE = 0 and the GFLVL=0 (i.e. All FIFO data
has been read).
Note: If GINT (irrespective of GVALID) remains set after the FIFO has been read GFLVL times, this indicates that new data has been added to FIFO during
the last FIFO read.
Clear Interrupt Registers (0xE4 – 0xE7)
Interrupts are cleared by “address accessing” the appropriate register. This is special I2C transaction consisting of only
two bytes: chip address with R/W = 0, followed by a register address.
Registers Address Bits Description
IFORCE 0xE4 7:0 Forces an interrupt (any value)
PICLEAR 0xE5 7:0 Proximity interrupt clear (any value)
CICLEAR 0xE6 7:0 ALS interrupt clear (any value)
AICLEAR 0xE7 7:0 Clears all non-gesture interrupts (any value)
Gesture FIFO Register (0xFC – 0xFF)
In Gesture mode, the RAM area is repurposed as a 32 x 4 byte FIFO. Data is stored in four byte blocks. Each block, called a
dataset, contains one integration cycle of UP, DOWN, LEFT, & RIGHT gesture data. Thirty-two separate datasets are stored
within the FIFO before wrap-around overow. If the FIFO overows (i.e. 33 datasets before host/system can empty FIFO)
new datasets will not replace existing datasets; instead an overow ag will be set and new data will be lost.
Host/Systems acquire gesture data by reading addresses: 0xFC, 0xFD, 0xFE, & 0xFF, which directly correspond to UP,
DOWN, LEFT, & RIGHT data points. Data can be read a single byte at a time (four consecutive I2C transactions) or by using
a page read.
The internal FIFO read pointer and the FIFO Level register, GFLVL, values are updated when address 0xFF is accessed
(single byte transactions) or when every fourth byte, corresponding to address 0xFF, is accessed in in page mode. If the
FIFO continues to be accessed after GFLVL register is zero, dataset will be read as zero values.
The recommended procedure for reading data stored in the FIFO begins when a gesture interrupt is generated (GFLVL >
GFIFOTH). Next, the host reads the FIFO Level register, GFLVL, to determine the amount of valid data in the FIFO.
Finally, the host begins to read address 0xFC (page read), and continues to read (clock-out data) until the FIFO is empty
(Number of bytes is 4X GFLVL). For example, if GFLVL = 2, then the host should initiate a read at address 0xFC, and se-
quentially read all eight bytes. As the four-byte blocks are read, GFLVL register is decremented and the internal FIFO
pointers are updated.
Field Address Bits Description
GFIFO_U 0xFC 7:0 Gesture FIFO UP value.
GFIFO_D 0xFD 7:0 Gesture FIFO DOWN value.
GFIFO_L 0xFE 7:0 Gesture FIFO LEFT value.
GFIFO_R 0xFF 7:0 Gesture FIFO RIGHT value.