User Manual

19
Register Set
The APDS-9960 is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the ADC
conversions.
Address Register Name Type Register Function Reset Value
0x00 –
0x7F
RAM R/W RAM 0x00
0x80 ENABLE R/W Enable states and interrupts 0x00
0x81 ATIME R/W ADC integration time 0xFF
0x83 WTIME R/W Wait time (non-gesture) 0xFF
0x84 AILTL R/W ALS interrupt low threshold low byte --
0x85 AILTH R/W ALS interrupt low threshold high byte --
0x86 AIHTL R/W ALS interrupt high threshold low byte 0x00
0x87 AIHTH R/W ALS interrupt high threshold high byte 0x00
0x89 PILT R/W Proximity interrupt low threshold 0x00
0x8B PIHT R/W Proximity interrupt high threshold 0x00
0x8C PERS R/W Interrupt persistence lters (non-gesture) 0x00
0x8D CONFIG1 R/W Conguration register one 0x40
0x8E PPULSE R/W Proximity pulse count and length 0x40
0x8F CONTROL R/W Gain control 0x00
0x90 CONFIG2 R/W Conguration register two 0x01
0x92 ID R Device ID ID
0x93 STATUS R Device status 0x00
0x94 CDATAL R Low byte of clear channel data 0x00
0x95 CDATAH R High byte of clear channel data 0x00
0x96 RDATAL R Low byte of red channel data 0x00
0x97 RDATAH R High byte of red channel data 0x00
0x98 GDATAL R Low byte of green channel data 0x00
0x99 GDATAH R High byte of green channel data 0x00
0x9A BDATAL R Low byte of blue channel data 0x00
0x9B BDATAH R High byte of blue channel data 0x00
0x9C PDATA R Proximity data 0x00
0x9D POFFSET_UR R/W Proximity oset for UP and RIGHT photodiodes 0x00
0x9E POFFSET_DL R/W Proximity oset for DOWN and LEFT photodiodes 0x00
0x9F CONFIG3 R/W Conguration register three 0x00
0xA0 GPENTH R/W Gesture proximity enter threshold 0x00
0xA1 GEXTH R/W Gesture exit threshold 0x00
0xA2 GCONF1 R/W Gesture conguration one 0x00
0xA3 GCONF2 R/W Gesture conguration two 0x00
0xA4 GOFFSET_U R/W Gesture UP oset register 0x00
0xA5 GOFFSET_D R/W Gesture DOWN oset register 0x00
0xA7 GOFFSET_L R/W Gesture LEFT oset register 0x00
0xA9 GOFFSET_R R/W Gesture RIGHT oset register 0x00
0xA6 GPULSE R/W Gesture pulse count and length 0x40
0xAA GCONF3 R/W Gesture conguration three 0x00
0xAB GCONF4 R/W Gesture conguration four 0x00
0xAE GFLVL R Gesture FIFO level 0x00
0xAF GSTATUS R Gesture status 0x00
0xE4 (1) IFORCE W Force interrupt 0x00
0xE5 (1) PICLEAR W Proximity interrupt clear 0x00
0xE6 (1) CICLEAR W ALS clear channel interrupt clear 0x00
0xE7 (1) AICLEAR W All non-gesture interrupts clear 0x00
0xFC GFIFO_U R Gesture FIFO UP value 0x00
0xFD GFIFO_D R Gesture FIFO DOWN value 0x00
0xFE GFIFO_L R Gesture FIFO LEFT value 0x00
0xFF GFIFO_R R Gesture FIFO RIGHT value 0x00
Note
1. Interrupt clear and force registers require a special I2C “address accessing” transaction. Please refer to the Register Description section for details.