Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
9 of 76
© 2019 Dialog Semiconductor
3 Pinout
321
A
B
C
D
GPI_1
SDAnIRQ SCL
GPI_2
OUTN
OUTP
GPI_0/PWM
VDD
VDDIO
GND_2
GND_1
Analog
signal
Power Ground
Digital
signal
Top view
4 5 6
101112
VDD
OUTP
GND_1
SDA
SCL
nIRQ
1
2
3 7
8
9GPI_2
GPI_1
GPI_0/
PWM
GND_2
OUTN
VDDIO
Pin 1
Ground
Analog
signal
Digital
signal
Power
Top view
Figure 3: DA7280 Pinout Diagrams (Top View) for WLCSP (Left) and QFN (Right)
Table 2: Pin Description
Pin No.
WLCSP
Pin No.
QFN
Pin Name
Type
(Table 3)
Description
A1
12
nIRQ
DO
Interrupt request line to host, open-drain, active low, connect
to VDDIO via external pull-up resistor
A2
11
SCL
DI
I
2
C clock input
A3
10
SDA
DIO
I
2
C data input/output, open-drain, connect to VDDIO via
external pull-up resistor
B1
2
GPI_1
DI
GPI sequence trigger 1
B2
1
GPI_2
DI
GPI sequence trigger 2
B3
9
VDDIO
PWR
Supply for digital I/O interfaces
C1
3
GPI_0/PWM
DI
GPI sequence trigger 0, or PWM input
C2
8
OUTN
AO
Haptic driver negative output
C3
7
GND_2
GND
Ground
D1
4
VDD
PWR
Haptics power supply; decouple to GND_1
D2
5
OUTP
AO
Haptic driver positive output
D3
6
GND_1
GND
Ground
Table 3: Pin Type Definition
Pin Type
Description
Pin Type
Description
DI
Digital input
AO
Analog output
DO
Digital output
PWR
Power
DIO
Digital input/output
GND
Ground