Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
64 of 76
© 2019 Dialog Semiconductor
Table 47: TOP_CTL2 (0x0023)
Bit
Mode
Symbol
Description
Reset
[7:0]
RW
OVERRIDE_
VAL
Used to set the output drive level in DRO mode. Scales the
contents of ACTUATOR_ABSMAX and/or
ACTUATOR_NOMMAX, depending on whether Active
Acceleration is enabled. See Section 5.2.4.
OVERRIDE_VAL
Value
Scaling factor
when
ACCELERATION_
EN = 0
Scaling factor
when
ACCELERATION_
EN = 1
0x7F
1
1
0x7E
0.992
0.992
...
…step of 0.008…
…step of 0.008…
0x01
0.0079
0.0079
0x00
0
0
0xFF
-0.0079
0
...
…step of 0.008…
…step of 0.008…
0x81
-1
0
0x80
-1
0
0x0
Table 48: SEQ_CTL1 (0x0024)
Bit
Mode
Symbol
Description
Reset
[2]
RW
FREQ_WAVE
FORM_TIME
BASE
Frequency waveform timebase setting for waveform memory
frames. See Section 5.8.3.
0x0 5.44, 21.76, 43.52, 87.04 ms
0x1 1.36, 5.44, 21.76, 43.52 ms
0x0
[1]
RW
WAVEGEN_
MODE
Enable bit for custom waveform operation, see Section 5.7.5.
● If WAVEGEN_MODE = 0, then set BEMF_SENSE_EN = 1
● If WAVEGEN_MODE = 1,then set BEMF_SENSE_EN = 0
0x0 = Normal wave mode (step/ramp sequences)
0x1 = Custom wave mode (sinewave sequences)
0x0
[0]
RW
SEQ_CONTI
NUE
Control for back-to-back Waveform Memory sequence playback
during RTWM and ETWM modes. If SEQ_CONTINUE = 1, new
sequence playback starts at end of current sequence. Register is
self-cleared when the next sequence is started, see Section 5.6.5.
0x0
Table 49: SWG_C1 (0x0025)
Bit
Mode
Symbol
Description
Reset
[7:0]
RW
CUSTOM_W
AVE_GEN_C
OEFF1
Coefficient1 for custom wave generation, represents a proportion
of the set IMAX, see Section 5.7.5. Default corresponds to a sine
wave.
0x00 = 0 %
0x01 = 0.4 %
… …steps of approx. 0.4 %
0x61 = 37.9 %
... …steps of approx. 0.4 %
0xFF = 100 %
0x61