Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
62 of 76
© 2019 Dialog Semiconductor
Bit
Mode
Symbol
Description
Reset
[3:0]
RW
FULL_BRAKE_T
HR
Full-brake threshold for PWM mode with step size 6.66%, see
Section 5.2.5.
0x0 = brake threshold disabled
0x1 = 6.66 % of ACTUATOR_NOMMAX
0x2 = 13.33 % of ACTUATOR_NOMMAX
... …~6.66% steps…
0x15 = 100 % of ACTUATOR_NOMMAX
0x1
Table 38: TOP_CFG3 (0x0015)
Bit
Mode
Symbol
Description
Reset
[3:0]
RW
VDD_MARGIN
V
DD
margin setting. Target voltage needs to be below
V
DD
- VDD_MARGIN, otherwise voltage is clamped to
V
DD
- VDD_MARGIN and a LIM_DRIVE IRQ is generated. See
Section 5.7.13 for further details.
0x0 = 0 mV
0x1 = 187.5 mV
0x2 = 375 mV
0x3 = 562.5 mV
... …187.5 mV steps…
0xF = 2.8125 V
0x3
Table 39: TOP_CFG4 (0x0016)
Bit
Mode
Symbol
Description
Reset
[7]
RW
V2I_FACTOR_FR
EEZE
Stop automatic updates to V2I_FACTOR_x, see Section 5.7.3.
0x0 = updates enabled
0x1 = updates disabled
0x0
[6]
RW
CALIB_IMPEDAN
CE_DIS
Stop automatic updates to V2I_FACTOR_x during playback, see
Section 5.7.3.
0x0 = updates enabled
0x1 = updates disabled
0x1
Table 40: TOP_INT_CFG1 (0x0017)
Bit
Mode
Symbol
Description
Reset
[7:2]
RW
FRQ_LOCKED_L
IM
Limit for generating frequency locked signal that enabled scaling
of the frequency tracking PID gain, see Section 5.7.1. If error is
below the FRQ_LOCKED_LIM*4 frequency is locked
0x20
[1:0]
RW
BEMF_FAULT_LI
M
Limit for BEMF fault generation. If voltage is below the threshold
BEMF, a fault is generated, see Section 5.7.14.
0x0 = BEMF fault disabled
0x1 = 4.9 mV
0x2 = 27.9 mV
0x3 = 49.9 mV
0x1
Table 41: TOP_INT_CFG6_H (0x001C)
Bit
Mode
Symbol
Description
Reset
[7:0]
RW
FRQ_PID_Kp_H
MS-bits of the frequency tracking loop PID Kp proportional
coefficient, see Section 5.7.1 for details
0x0E