Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
61 of 76
© 2019 Dialog Semiconductor
Table 35: CALIB_IMP_L (0x0012)
Bit
Mode
Symbol
Description
Reset
[1:0]
RO
IMPEDANCE_L
LS-bits of calculated impedance (default 22 Ω), see Section 5.7.3.
0x0
Table 36: TOP_CFG1 (0x0013)
Bit
Mode
Symbol
Description
Reset
[7]
RW
EMBEDDED_M
ODE
Embedded operation enable (self-clearing IRQs), see
Section 5.7.7.
0x0 = Faults cleared by host
0x1 = DA7280 clears faults automatically
0x0
[5]
RW
ACTUATOR_TY
PE
Specifies actuator type: LRA or ERM, see Section 5.6.2.
0x0 = LRA
0x1 = ERM
0x0
[4]
RW
BEMF_SENSE_
EN
Enable internal loop computations; should be disabled only in
custom waveform and wideband operation, see Sections 5.7.5
and 5.7.6.
0x0 = Custom Waveform Operation
0x1 = Standard Operation
0x1
[3]
RW
FREQ_TRACK_
EN
Enable resonant frequency tracking; ignored in ERM mode, see
Section 5.3.
0x0 = frequency tracking disabled
0x1 = frequency tracking enabled
0x1
[2]
RW
ACCELERATION
_EN
Enable Active Acceleration, see Section 5.4.
0x0 = Active Acceleration disabled
0x1 = Active Acceleration enabled
0x1
[1]
RW
RAPID_STOP_E
N
Enable Rapid Stop, see Section 5.4.
0x0 = Rapid Stop disabled
0x1 = Rapid Stop enabled
0x1
[0]
RW
AMP_PID_EN
Enable Amplitude PID, see Section 5.4.
0x0 = Amplitude PID disabled
0x1 = Amplitude PID enabled
0x0
Table 37: TOP_CFG2 (0x0014)
Bit
Mode
Symbol
Description
Reset
[4]
RW
MEM_DATA_SIG
NED
Memory data format; set according to the value of
ACCELERATION_EN:
0x0 = unsigned (for ACCELERATION_EN = 1)
0x1 = signed (for ACCELERATION_EN = 0)
0x0