Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
40 of 76
© 2019 Dialog Semiconductor
● When setting the impedance in V2I_FACTOR_H and V2I_FACTOR_L via the formula in Section
5.6.2, use Z
formula
= 2*Z
real
.
● When reading back from IMPEDANCE_H and IMPEDANCE_L, use an LSB of 0.03125 Ω.
5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
DA7280 monitors the level of the supply during playback and reports it via ADC_VDD_H and
ADC_VDD_L. The two should be concatenated and read using the following formula:
(13)
DA7280 uses this information to prevent the device from clipping to supply by limiting the drive to a
value determined by the VDD_MARGIN register in 187.5 mV steps where 0x0 corresponds to no
margin, see Figure 22.
Output drive clipping to
VDD – VDD_MARGIN, not ABSMAX
Time [s]
Voltage [V]
VDD
ABSMAX
VDD - VDD_MARGIN
VDD_MARGIN
Figure 22: Automatic Output Limiting
The functionality is needed as DA7280 regulates current and if supply clipping occurs, the regulation
stops and the BEMF information is lost. Furthermore, the VDD_MARGIN register allows limiting of
the power across the actuator for low supply values to prevent the battery from discharging too fast.
5.7.14 BEMF Fault Limit
To detect malfunctioning actuators that have stopped moving due to a mechanical fault, DA7280 can
be configured to trigger an actuator fault if the BEMF voltage level falls below a threshold for long
drive durations. The threshold for detection is set in BEMF_FAULT_LIM; a zero value of the register
disables the fault checking.
5.7.15 Increasing Impedance Detection Accuracy
To increase the accuracy of the impedance reading in IMPEDANCE_H and IMPEDANCE_L, the
register V2I_FACTOR_OFFSET_EN could be set to 0. This removes an algorithmic offset utilized by
the acceleration algorithm. Should V2I_FACTOR_OFFSET_EN be equal to 0, ACCELERATION_EN
is recommended to be set to 0.
5.7.16 Frequency Pause during Rapid Stop
To address low mechanical time constant LRAs (start/stop times less than 20 ms) and improve the
braking behavior, DA7280 has the option to pause frequency tracking during the execution of the
Rapid Stop algorithm by setting FRQ_PAUSE_ON_POLARITY_CHANGE to 1.