Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagrams
- Contents
- Figures
- Tables
- Legal
- Product Family
- 1 Terms and Definitions
- 2 Block Diagram
- 3 Pinout
- 4 Characteristics
- 5 Functional Description
- 5.1 Features Description
- Driving LRA and ERM Actuators
- Automatic LRA Resonant Frequency Tracking
- Wideband LRA Support
- I2C and PWM Input Streaming
- Low Latency I2C/GPI Wake-Up from IDLE State
- Three GPI Sequence Triggers for up to Six Independent Haptic Responses
- On-Board Waveform Memory with Amplitude, Time, and Frequency Control
- Active Acceleration and Rapid Stop for High-Fidelity Haptic Feedback
- Continuous Actuator Diagnostics and Fault Handling
- No Software Requirements with Embedded Operation
- Differential Output Drive
- Current Driven System
- Configurable EMI Suppression
- Automatic Short Circuit Protection
- Ultra-Low Power Consumption with State Retention
- Ultra-Low Latency in STANDBY State
- Supply Monitoring, Reporting, and Automatic Output Limiting
- Open- and Closed-Loop Modes
- Open-Loop Sine/Custom Wave Drive Support
- Small Solution Footprint
- Additional Features
- 5.2 Functional Modes
- 5.3 Resonant Frequency Tracking
- 5.4 Active Acceleration and Rapid Stop
- 5.5 Wideband Frequency Control
- 5.6 Device Configuration and Playback
- 5.7 Advanced Operation
- 5.7.1 Frequency Tracking
- 5.7.2 Rapid Stop
- 5.7.3 Initial Impedance Update
- 5.7.4 Amplitude PID
- 5.7.5 Wideband Operation
- 5.7.6 Custom Waveform Operation
- 5.7.7 Embedded Operation
- 5.7.8 Polarity Change Reporting for Half-Period Control in DRO Mode
- 5.7.9 Loop Filter Configuration
- 5.7.10 UVLO Threshold
- 5.7.11 Edge Rate Control
- 5.7.12 Double Output Current Range
- 5.7.13 Supply Monitoring, Reporting, and Automatic Output Limiting
- 5.7.14 BEMF Fault Limit
- 5.7.15 Increasing Impedance Detection Accuracy
- 5.7.16 Frequency Pause during Rapid Stop
- 5.7.17 Frequency Pause during Rapid Stop
- 5.7.18 Coin ERM Operation
- 5.8 Waveform Memory
- 5.9 General Data Format
- 5.10 I2C Control Interface
- 5.1 Features Description
- 6 Register Overview
- 7 Package Information
- 8 Ordering Information
- 9 Application Information
- 10 Layout Guidelines
DA7280
LRA/ERM Haptic Driver with Multiple Input Triggers,
Integrated Waveform Memory and Wideband Support
Datasheet
Revision 3.0
30-Jul-2019
CFR0011-120-00
4 of 76
© 2019 Dialog Semiconductor
Figures
Figure 1: System Diagrams ................................................................................................................... 2
Figure 2: DA7280 Block Diagram .......................................................................................................... 8
Figure 3: DA7280 Pinout Diagrams (Top View) for WLCSP (Left) and QFN (Right) ............................ 9
Figure 4: I
2
C Interface Timing .............................................................................................................. 12
Figure 5: LRA Output Acceleration Swept in Frequency with Constant Power Input Signal .............. 14
Figure 6: Narrowband and Wideband LRA Response across Frequency .......................................... 15
Figure 7: Dual Mode LRA Response across Frequency ..................................................................... 15
Figure 8: System State Diagram ......................................................................................................... 19
Figure 9: Example PWM Inputs with ACCELERATION_EN = 0 ......................................................... 21
Figure 10: LRA Single Step Drive without Acceleration and Rapid Stop ............................................ 24
Figure 11: LRA Single Step with Acceleration and Rapid Stop........................................................... 24
Figure 12: Simple Drive (Top) versus Active Acceleration and Rapid Stop Enabled (Bottom) ........... 24
Figure 13: Operation in DRO Mode ..................................................................................................... 28
Figure 14: Operation in PWM Mode .................................................................................................... 29
Figure 15: Operation in RTWM Mode ................................................................................................. 30
Figure 16: Operation in ETWM Mode .................................................................................................. 32
Figure 17: Output Voltage and Current for Different AMP_PID_EN Values ....................................... 35
Figure 18: Custom Wave Point Numbering ......................................................................................... 36
Figure 19: Half-Period Control in DRO Mode ...................................................................................... 37
Figure 20: Polarity Timing Relationship ............................................................................................... 38
Figure 21: Equivalent Electrical Model of an Actuator ........................................................................ 38
Figure 22: Automatic Output Limiting .................................................................................................. 40
Figure 23: Coin ERM Physical and Electrical Summary ..................................................................... 41
Figure 24: Waveform Memory Structure ............................................................................................. 42
Figure 25: Snippet Ramp and Step with ACCELERATION_EN = 1 ................................................... 44
Figure 26: Snippet Example ................................................................................................................ 44
Figure 27: Command Structure for a Single Frame ............................................................................ 45
Figure 28: Sequence Structure ........................................................................................................... 46
Figure 29: Waveform Memory Example .............................................................................................. 47
Figure 30: Overview of Data Formats with Acceleration Disabled ...................................................... 48
Figure 31: Overview of Data Formats with Acceleration Enabled ....................................................... 49
Figure 32: Schematic of the I
2
C Control Interface Bus........................................................................ 51
Figure 33: I
2
C START and STOP Conditions ...................................................................................... 51
Figure 34: I
2
C Byte Write (SDA line) ................................................................................................... 52
Figure 35: Examples of the I
2
C Byte Read (SDA line) ........................................................................ 52
Figure 36: Examples of I
2
C Page Read (SDA line) ............................................................................. 52
Figure 37: I
2
C Page Write (SDA line) .................................................................................................. 53
Figure 38: I
2
C Repeated Write (SDA line) ........................................................................................... 53
Figure 39: WLCSP Package Outline Drawing ..................................................................................... 71
Figure 40: QFN Package Outline Drawing .......................................................................................... 72
Figure 41: External Components Diagram .......................................................................................... 74
Figure 42: WLCSP Example PCB Layout ........................................................................................... 75
Figure 43: QFN Example PCB Layout ................................................................................................ 75
Tables
Table 1: DA728x Feature Comparison .................................................................................................. 6
Table 2: Pin Description ........................................................................................................................ 9
Table 3: Pin Type Definition .................................................................................................................. 9
Table 4: Absolute Maximum Ratings ................................................................................................... 10
Table 5: Recommended Operating Conditions ................................................................................... 10
Table 6: Current Consumption ............................................................................................................ 11
Table 7: Electrical Characteristics ....................................................................................................... 11
Table 8: Timing Characteristics ........................................................................................................... 12