Data Sheet

bq24072
,
bq24073
,
bq24074
,
bq24075
,
bq24079
www.ti.com
SLUS810K SEPTEMBER 2008REVISED MARCH 2015
9.3 Feature Description
9.3.1 Undervoltage Lockout (UVLO)
The bq2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage
threshold (UVLO).
During the power down mode the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the
V
OUT(SC2)
circuitry is active and monitors for overload conditions on OUT.
9.3.2 Power On
When V
IN
exceeds the UVLO threshold, the bq2407x powers up. While V
IN
is below V
BAT
+ V
IN(DT)
, the host
commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the V
OUT(SC2)
circuitry is active and monitors for
overload conditions on OUT.
Once V
IN
rises above V
BAT
+ V
IN(DT)
, PGOOD is driven low to indicate the valid power status and the CE, EN1,
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If
SYSOFF is high, FET Q2 is off). During this mode, the V
OUT(SC2)
circuitry is active and monitors for overload
conditions on OUT.
When the input voltage at IN is within the valid range: V
IN
> UVLO AND V
IN
> V
BAT
+ V
IN(DT)
AND V
IN
< V
OVP
, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) (HI, HI)] all internal
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a
short circuit at OUT. When V
OUT
is above V
SC
, the FET Q1 switches to the current limit threshold set by EN1,
EN2 and R
ILIM
and the device enters into the normal operation. During normal operation, the system is powered
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as
well as the input voltage conditions.
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