Data Sheet

START;
Send device address + write mode
Send address of FIFO_RD_PTR;
Write FIFO_RD_PTR;
STOP;
Third transaction: Write to FIFO_RD_PTR register. If the second transaction was successful, FIFO_RD_PTR points to the
next sample in the FIFO, and this third transaction is not necessary. Otherwise, the processor updates the FIFO_RD_PTR
appropriately, so that the samples are reread.
FIFO Conguration (0x08)
Bits 7:5: Sample Averaging (SMP_AVE)
To reduce the amount of data throughput, adjacent samples (in each individual channel) can be averaged and decimated
on the chip by setting this register.
Bit 4: FIFO Rolls on Full (FIFO_ROLLOVER_EN)
This bit controls the behavior of the FIFO when the FIFO becomes completely filled with data. If FIFO_ROLLOVER_EN
is set (1), the FIFO Address rolls over to zero and the FIFO continues to fill with new data. If the bit is not set (0), then
the FIFO is not updated until FIFO_DATA is read or the WRITE/READ pointer positions are changed.
Bits 3:0: FIFO Almost Full Value (FIFO_A_FULL)
This register sets the trigger for the FIFO_A_FULL interrupt. For example, if set to 0x0F, the interrupt triggers when there
are 15 empty space left (17 data samples), and so on.
Table 3. Sample Averaging
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REG
ADDR
POR
STATE
R/W
FIFO
Conguration
SMP_AVE[2:0]
FIFO_ROL
LOVER_EN
FIFO_A_FULL[3:0] 0x08 0x00 R/W
SMP_AVE[2:0] NO. OF SAMPLES AVERAGED PER FIFO SAMPLE
000 1 (no averaging)
001 2
010 4
011 8
100 16
101 32
110 32
111 32
FIFO_A_FULL[3:0] NO. OF SAMPLES IN THE FIFO
0x0h 32
0x1h 31
0x2h 30
0x3h 29
… …
0xFh 17
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Maxim Integrated │ 18
MAX30105 High-Sensitivity Optical Sensor
for Smoke Detection Applications