Product Specifications

CY8C29466/CY8C29566
CY8C29666/CY8C29866
Document Number: 38-12013 Rev. AB Page 64 of 67
*N 2902396 NJF 03/30/2010
Updated and content in Digital System
Updated Cypress website links.
Removed reference to PSoC Designer 4.4 in PSoC Designer Software
Subsystems
Added T
BAKETEMP
and T
BAKETIME
parameters in Absolute Maximum Ratings
Updated AC Chip-Level Specifications
Changed unit for SPIS function to ns in AC Digital Block Specifications
Updated notes in Packaging Information and package diagrams.
Updated Solder Reflow Specifications
Updated Emulation and Programming Accessories
Removed Third Party Tools and Build a PSoC Emulator into Your Board.
Updated Ordering Information and Ordering Code Definitions.
*O 2940410 YJI 05/31/2010
Updated content to match current style guide and datasheet template.
No technical updates.
*P 3044869 NJF 10/01/2010 Added PSoC Device Characteristics table .
Added DC I
2
C Specifications table.
Added F
32K_U
max limit.
Added Tjit_IMO specification, removed existing jitter specifications.
Updated Analog reference tables.
Updated Units of Measure, Acronyms, Glossary, and References sections.
Updated solder reflow specifications.
No specific changes were made to AC Digital Block Specifications table and
I
2
C Timing Diagram. They were updated for clearer understanding.
Updated Figure 13 since the labelling for y-axis was incorrect.
Template and styles update.
Removed footnote reference for “Solder Reflow Peak Temperature” table.
*Q 3017427 GDK 11/08/10
Removed the pruned part “CY8C29666-24LFXI” from the Ordering Information
and Accessories (Emulation and Programming).
*R 3263978 NJF 05/23/11
Updated Logic Block Diagram.
Updated Solder Reflow Specifications.
*S 3301676 NJF 07/04/11
Fixed page numbering error on footer.
*T 3358177 NJF / GIR /
BTK / NPD
09/26/11
Updated max value for ‘0b011’ under Table 22 on page 33.
Updated V
REFHI
values for ‘0b100’ under Table 21 on page 29.
Incorrect flash/SRAM size mentioned under section PSoC Core on page 4.
Changed paragraph “Memory uses 16 KB of flash for program storage, 256
bytes of SRAM for data storage, and up to 2 KB of EEPROM emulated using
the flash. Program flash uses four protection levels on blocks of 64 bytes,
allowing customized software information protection (IP)” to “Memory uses
16 KB of flash for program storage, 256 bytes of SRAM for data storage, and
up to 2 KB of EEPROM emulated using the flash. Program flash uses four
protection levels on blocks of 64 bytes, allowing customized software
information protection (IP)”.
Removed package diagram spec 001-12919 as there is no MPN mapped to
this package.
The text “Pin must be left floating” is included under Description of NC pin in
Table 6 on page 14.
*U
3598291 LURE /
XZNG
04/24/2012 Changed the PWM description string from “8- to 32-bit” to “8- and 16-bit”.
Updated package diagrams 001-13191 and 51-85048.
Document History Page (continued)
Document Title: CY8C29466/CY8C29566/CY8C29666/CY8C29866, PSoC
®
Programmable System-on-Chip™
Document Number: 38-12013
Revision ECN
Origin of
Change
Submission
Date
Description of Change