Product Specifications

CY8C29466/CY8C29566
CY8C29666/CY8C29866
Document Number: 38-12013 Rev. AB Page 63 of 67
Document History Page
Document Title: CY8C29466/CY8C29566/CY8C29666/CY8C29866, PSoC
®
Programmable System-on-Chip™
Document Number: 38-12013
Revision ECN
Origin of
Change
Submission
Date
Description of Change
** 131151 New
Silicon
11/13/2003 New document (Revision **).
*A 132848 NWJ 01/21/2004 New information. First edition of preliminary datasheet.
*B 133205 NWJ 01/27/2004 Changed part numbers, increased SRAM data storage to 2 K bytes.
*C 133656 SFV 02/09/2004 Changed part numbers and removed a 28-pin SOIC.
*D 227240 SFV 06/01/2004 Changes to Overview section, 48-pin MLF pinout, and significant changes to
the Electrical Specs.
*E 240108 SFV See ECN Added a 28-lead (300 mil) SOIC part.
*F 247492 SFV See ECN New information added to the Electrical Specifications chapter.
*G 288849 HMT See ECN Add DS standards, update device table, fine-tune pinouts, add Reflow Peak
Temp. table. Finalize.
*H 722736 HMT See ECN Add QFN package clarifications. Add new QFN diagram. Add Low Power
Comparator (LPC) AC/DC electrical spec. tables. Add CY8C20x34 to PSoC
Device Characteristics table. Update emulation pod/feet kit part numbers. Add
OCD non-production pinouts and package diagrams. Add ISSP note to pinout
tables. Update package diagram revisions. Update typical and recommended
Storage Temperature per industrial specs. Update CY branding and QFN
convention. Add new Dev. Tool section. Update copyright and trademarks.
*I 2503350 DFK /
PYRS
See ECN Pinout for CY8C29000 OCD wrongly included details of CY8C24X94. The
correct pinout for CY8C29000 is included in this version. Added note on digital
signaling in “DC Analog Reference Specifications” section.
*J 2545030 YARA 07/29/08 Added note to Ordering Information
*K 2708295 JVY 04/22/2009 Changed title from “CY8C29466, CY8C29566, CY8C29666, and CY8C29866
PSoC Mixed Signal Array Final datasheet” to “CY8C29466, CY8C29566,
CY8C29666, and CY8C29866 PSoC
®
Programmable System-on-Chip™”
Updated to datasheet template
Added 48-Pin QFN (Sawn) package diagram and CY8C29666-24LTXI and
CY8C29666-24LTXIT part details in the Ordering Information table
Updated DC GPIO, AC Chip-Level, and AC Programming Specifications as
follows:
Modified F
IMO6
(page 27), T
WRITE
specifications (page 34)
Added I
OH
(page 21), I
OL
(page 21), DC
ILO
(page 28), F
32K_U
(page 27),
T
POWERUP
(page 28), T
ERASEALL
(page 34), T
PROGRAM_HOT
(page 34), and
T
PROGRAM_COLD
(page 34) specifications
*L 2761941 DRSW /
AESA
09/10/2009
Added SR
POWER_UP
parameter in AC specs table
.
.
*M 2842762 DRSW 01/08/2010
Corrected Notes for V
DD
parameter in Table 13, “DC Chip-Level Specifica-
tions,” on page 22.
Added “Contents” on page 3.
Updated links in Sales, Solutions, and Legal Information.