Data Sheet

PRELIMINARY
VS1063a Datasheet
9 FUNCTIONAL DESCRIPTION
9.8.2 SCI_STATUS (RW)
SCI_STATUS contains information on the current status of VS1063a. It also controls some
low-level things that the user does not usually have to care about.
Note: “Mode” in the following table tells if that bit is a hardware (HW) or software (SW) control.
Name Bits Mode Description
SS_DO_NOT_JUMP 15 SW Header in decode, do not fast forward/rewind
SS_SWING 14:12 HW Set swing to +0 dB, +0.5 dB, . . . , or +3.5 dB
SS_VCM_OVERLOAD 11 HW GBUF overload indicator ’1’ = overload
SS_VCM_DISABLE 10 HW GBUF overload detection ’1’ = disable
9:8 SW reserved
SS_VER 7:4 SW Version
SS_APDOWN2 3 HW Analog driver powerdown
SS_APDOWN1 2 HW Analog internal powerdown
SS_AD_CLOCK 1 HW AD clock select, ’0’ = 6 MHz, ’1’ = 3 MHz
SS_REFERENCE_SEL 0 HW Reference voltage selection, ’0’ = 1.23 V, ’1’ = 1.65 V
SS_DO_NOT_JUMP is set when a WAV, Ogg Vorbis, WMA, MP4, or AAC-ADIF header is
being decoded and jumping to another location in the file is not allowed. If you use soft reset or
cancel, clear this bit yourself or it can be accidentally left set.
SS_SWING allows you to go above the 0 dB volume setting. Value 0 is normal mode, 1 gives
+0.5 dB, and 2 gives +1.0 dB. Settings from 3 to 7 cause the DAC modulator to be overdriven
and should not be used. You can use SS_SWING with I2S to control the amount of headroom.
VS1063a contains GBUF protection circuit which disconnects the GBUF driver when too much
current is drawn, indicating a short-circuit to ground. SS_VCM_OVERLOAD is high while the
overload is detected. SS_VCM_DISABLE can be set to disable the protection feature.
SS_VER is 0 for VS1001, 1 for VS1011, 2 for VS1002, 3 for VS1003, 4 for VS1053 and VS8053,
5 for VS1033, 6 for VS1063, and 7 for VS1103.
SS_APDOWN2 controls analog driver powerdown. SS_APDOWN1 controls internal analog
powerdown. These bits are meant to be used by the system firmware only.
If the user wants to powerdown VS1063a with a minimum power-off transient, set SCI_VOL to
0xffff, then wait for at least a few milliseconds before activating reset.
SS_AD_CLOCK can be set to divide the AD modulator frequency by 2 if XTALI is in the
24. . . 26 MHz range.
If AVDD is at least 3.3 V, SS_REFERENCE_SEL can be set to select 1.65 V reference voltage
to increase the analog output swing.
Version: 0.42, 2011-11-24 42