Data Sheet

PRELIMINARY
VS1063a Datasheet
9 FUNCTIONAL DESCRIPTION
9.4 Codec Data Flow of VS1063a
5−channel
Audio
PauseMono
BassUser
control
Treble Speed
EarSpeaker
equalizer
To DAC
SCI_VOL
Bitstream
SDI bus
PCM audio
ST_AMPLITUDE=0SB_AMPLITUDE=0
AIADDR != 0
AIADDR=0
EQ5 Enable = 1
ST_AMPL=0 &
SB_AMPL=0 &
EarSpeakerLevel!=0 &
earSpeakerLevel=0
ST_AMPLITUDE!=0SB_AMPLITUDE != 0
Bitstream
shifter
FIFO
enhancer
FIFO
SPEEDSHIFTER_ON=0
SPEEDSHIFTER_ON=0&
SPEEDSHIFTER_ON=1
MONO_OUTPUT=0
PAUSE_ON
WAV
ADC
Mic/Line In
Software
FIFO
Audio in
To UART
Bitstream
out FIFO
UartTxEna=1
To SCI
AEC
SRC
MONO_OUTPUT=1
decimator UartTxEna=0
DAC
Encoder
WAV
plugin
Figure 15: Codec data flow of VS1063a
Figure 15 presents the codec dataflow of VS1063a.
The decoder and encoder paths are almost similar as in the decoder and encoder data flow
Chapters 9.2 and 9.3, except that there is no decoder audio side path and the amount of
samplerates in the encoder is much more limited because the Resampler SRC is not used.
A new path is when Acoustic Echo Cancellation (AEC) is active. In this case there is a feedback
from the output path to the input path.
Note: Do not use Speed shifter in Codec mode, nor Pause mode.
Note: Do not use EarSpeaker if AEC is active.
Note: If AEC is used, encoding and decoding samplerates must be the same. Otherwise they
may be different.
Version: 0.42, 2011-11-24 36