Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 63 of 200 Version:0.09
8.2 Tearing Effect Line Timing
The Tearing Effect signal is described below:
t
vdh
Vertical Timing
Horizontal Timing
t
hdl
t
hdh
t
vdl
Table 8.2.1 AC characteristics of Tearing Effect Signal Idle Mode Off/On (Frame Rate = 58.9Hz)
Symbol Parameter min max unit descritpion
tvdl Vertical Timing Low Duration 13 - Ms
tvdh Vertical Timing High Duration 1000 - s
thdl Horizontal Timing Low Duration 33 - s
thdh Horizontal Timing High Duration 25 500 s
Notes:
1. The timings in Table 8.2.1 apply when MADCTL B4=0 and B4=1
2. The signal’s rise and fall times (tf, tr) are stipulated to be equal to or less than 15ns.
Figure41: Rise and fall times
t
r
t
f
80%
20%
80%
20%
The Tearing Effect Output Line is fed back to the MCU and should be used as shown below to avoid
Tearing Effect: