Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 37 of 200 Version:0.09
6.8.2 RGB Interface Timing
The timing chart of 18-/16-bit RGB interface mode is shown as below.
HS
VS
PCLK
EN
D[17:0]
Back porch
VLW>=1H
1 frame
Front porch
Valid data
HLW>=3DOTCLKs
1H
DTST>=HLW
HS
PCLK
EN
D[17:0]
VLW : VS Low Width
HLW : HS Low Width
DTST : Data Transfer Startup Time
Figure24: Timing Chart of Signals in 18-/16-bit RGB Interface Mode