Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 30 of 200 Version:0.09
6.4.2 Read Cycle/Sequence
The read cycle means that the host reads information (commend or/and data) to the display via the interface.
Each read cycle (E low-high-low sequence) consists of 3 control (D/CX, E, R/WX) and data (D[17…0]). D/CX bit
is control signal, which tells if the data is a command or a data. The data signals are the command if the control
signal is low (=’0’) and vice versa it is data (=’1’)
RDX
D[7:0], D[8:0] or
D[15:0], D[17:0]
The display asserts
D[17:0], D[15:0], D[8:0] or
D[7:0] lines when there is
a falling edge of E
The host reads D[17:0],
D[15:0], D[8:0] or D[7:0]
lines when there is a
rising edge of E
The display negates
D[17:0], D[15:0], D[8:0]
or D[7:0] lines
R/WX = 1
Note: E is an unsynchronized signal (It can be stopped).
Figure15: 6800-Series Read Protocol
S
CMD CMD PA 1 CMD
CSX
D/CX
E
Read Parameter
Read display RAM data
Signals on D[17:0], D/CX, R/WX, E pins
during CSX= 1 are ignored
CMD: Write command code
PA: Write parameter or RAM data
D[17:0]
RESX
1
R/WX
D[17:0]
DM data data
P
S
CMD CMD PA CMD DM data data
P
S
CMD CMD
Host [17:0]
Host to LCD
P
Driver [17:0]
LCD to Host
S
DM PA DM data data
P
Hi-Z
Hi-Z
Hi-Z
0
Figure16: 6800-Series Parallel bus protocol (Read from register or display RAM)