Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 21 of 200
Version:0.09
6.2 Serial Interface
The Module uses a 3-wire 9-bit serial interface or 4-pins/8-bit bi-directional interface for communication between
the micro controller and the LCD driver chip. The 3-pins serial use: CSX (chip enable), SCL(serial clock) and
SDA(serial data input/output) and the 4-pins serial use: CSX(chip enable), D/CX(data/ command select),
SCL(serial clock), and SDA(serial data input/output).
Table 6.2.1 Serial Interface Type Selection
IM2
4WSPI
Interface Read back selection
0 0 3-Pins Serial Interface
Via the read instruction(8-bit, 24-bit and 32-bit read parameter)
0 1 4-Pins Serial Interface
Via the read instruction(8-bit, 24-bit and 32-bit read parameter)
6.2.1 Command Write
The write mode of the interface means the micro controller writes commands and data to the LCD driver. 3-pins
serial data packet contains a control bit D/CX and a transmission byte and in 4-pins serial case, data packet
contains just transmission byte and control bit D/CX is transferred by the D/CX pin. If D/CX is “low”, the
transmission byte is interpreted as a command byte. If D/CX ishigh, the transmission byte is stored in the
display data RAM (Memory write command), or command register as parameter.
Any instruction can be sent in any orders to the Driver. The MSB is transmitted first. The serial interface is
initialized when CSX is high status. In this state, SCL clock pulse or SDA data have no effect. A falling edge on
CSX enables the serial interface and indicated the start of data transmission.
Figure1: 3-pins Serial Data Stream Format
D/CX D7 D6 D0D1D2D3D5 D4
Transmission byte(TB) may be a command or a date
MSB
LSB
D/CX
TB
D/CX
TB
D/CX
TB
Figure2: 4-pins Serial Data Stream Format
D7 D6 D0D1D2D3D5 D4
MSB
LSB
Transmission byte(TB) may be a command or a date
TB
TB
TB
When CSX is “high”, SCL clock is ignored. At the falling edge of CSX, SCL can be high or low. SDA is sampled
at the rising edge of CSX. D/CX indicates, whether the byte is command code (D/CX=’0’) or parameter/RAM
data (D/CX=’1’). If CSX stays low after the last bit of command/data byte, the serial interface expects the D/CX
bit (3-pin serial interface) or D7(4-pins serial interface) of the next byte at the next rising edge of SCL.