Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 195 of 200 Version:0.09
17.3 AC Characteristics
17.3.1. Parallel CPU 18/16/9/8-bit Bus
Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
Table 17.3.1 AC characteristics of parallel CPU I/F in asynchronous mode
Signal Symbol Parameter min max unit description
tast Address setup time 0 ns
D/CX
taht Address hold time(Write/Read) 10 ns
tchw ”S”"H" Pulse Widtch 0 ns
tcs Chip Select setup time (Write) 10 ns
trcs Chip Select setup time (Read ID) 45 ns
trcsfm Chip Select setup time (Read FM) 355 ns
CSX
tcsf Chip Select Wait time(Write/read) 10 ns
twc Write cycle 66 ns
twrh Controlpulse H duration 15 ns
WRX
twrl Control pulse L duration 15 ns
RDX trc Read cycle (ID) 160 ns When read ID