Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 152 of 200 Version:0.09
14.2.41 RGB Interface Blanking Porch setting (B5h)
B5h RGB Interface Blanking Porch setting
D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX
Command 0 1  x 1 0 1 1 0 1 0 1 B5h
1
st
Parameter
1 1  x x x HBP5 HBP4 HBP3 HBP2 HBP1 HBP0 08h
2
nd
Parameter
1 1  x VBP7 VBP6 VBP5 VBP4 VBP3 VBP2 VBP1 VBP0 03h
3
rd
Parameter
1 1  x x x x x x x VBP9 VBP8 00h
Description
Vertical and Horizontal back porch control when RGB I/F mode2(RCM[1:0]=11)
HBP[5:0]: Set the delay period from falling edge of HSYNC signal to first vali data.
HBP[5:0] No.of clock cycle of DOTCLK
00d 2
01d 3
02d 4
03d 5
:
:
:
:
(SETP1)
:
62d 64
63d 65
VBP[9:0]: Set the delay period from falling edge of VSYNC signal to first valid line.
VBP[9:0] No. of clock cycle of HSYNC
00d (invalid)
01d 1
02d 2
03d 3
:
:
:
:
(STEP1):
:
1022d 1022
Restriction -
Register
Availability
Status Availability
Normal Mode On, Idle Mode Off, Sleep Out Yes
Normal Mode On, Idle Mode On, Sleep Out Yes
Partial Mode On, Idle Mode Off, Sleep Out Yes
Partial Mode On, Idle Mode On, Sleep Out Yes
Sleep In Yes