Datasheet-2

a-Si TFT LCD Single Chip Driver
132RGBx162 Resolution and 262K color
ILI9163C
Page 135 of 200 Version:0.09
14.2.29 Memory Access Control (36h)
36H MADCTL (Memory Access Control)
D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX
Command 0 1  x 0 0 1 1 0 1 1 0 36h
1
st
Parameter
1 1  x MY MX MV ML RGB MH x x 00h
Description
This command defines read/write scanning direction of frame memory.
This command makes no change on the other driver status.
Bit Assignment
Bit Description Comment
MY Row Address Order
MX Column Address Order
MV Page/Column Selection
These 3 bits controls MPU to memory write/read direction.
ML Vertical Order LCD Vertical refresh direction control
RGB RGB/BGR Order
Color selector switch control
0=RGB color filter panel
1=BGR color filter panel
MH Display data latch order
‘1’=LCD Refresh right to left
‘0’=LCD Refresh left to right