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ILI9163C

a-Si TFT LCD Single Chip Driver

132RGBx162 Resolution and 262K color

Specification

Version: V0.10

Document No.: ILI9163C_DS_V010.pdf

ILI TECHNOLOGY CORP.

8F, No.38, Taiyuan St., Jhubei City, Hsinchu County,

Taiwan 302, R.O.C.

Tel.886-3-56000 99; Fax.886-3-560058 5

http://www.ilitek.com

Summary of content (200 pages)

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ILI9163C a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Specification Version: V0.10 Document No.: ILI9163C_DS_V010.pdf ILI TECHNOLOGY CORP. 8F, No.38, Taiyuan St., Jhubei City, Hsinchu County, Taiwan 302, R.O.C. Tel.886-3-5600099; Fax.886-3-5600585 http://www.ilitek.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Table of Contents 1. Introduction ................................................................................................................................................ 4 2. Features ..................................................................................................................................................... 4 3. Block Diagram..................................................................
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 8. Tearing Effect Output Line ......................................................................................................................... 4 8.1 Tearing Effect Line Modes .......................................................................................................................... 4 8.2 Tearing Effect Line Timing........................................................................................
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.14 Normal Display Mode On (13h)...................................................................................................... 4 14.2.15 Display Inversion Off (20h)............................................................................................................. 4 14.2.16 Display Inversion On (21h).............................................................................................................
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.35 Read ID2 (DBh).............................................................................................................................. 4 14.2.36 Read ID3 (DCh).............................................................................................................................. 4 14.2.56 Positive Gamma Correction Setting (E0h) ..................................................................................
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 1. Introduction ILI9163C is a 262,144-color one-chip SoC driver for a-TFT liquid crystal display with resolution of 132RGBx162 dots, comprising a 396-channel source driver, a 162-channel gate driver, 48,114bytes GRAM for graphic data of 132RGBx162 dots, and power supply circuit. The ILI9163C supports 18-/16-/9-/8-bit data bus interface and serial peripheral interfaces (SPI).
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color  ILI9163C MTP:  8-bits for ID2  8-bits for ID3  7-bits for VCOM adjustment  Low –power consumption architecture    Low operating power supplies:  VDDI = 1.65V ~ 3.3 V (interface I/O)  VCI = 2.5V ~ 4.0 V (analog) LCD Voltage drive:  Source/VCOM power supply voltage  AVDD – GND = 4.5V ~ 6.0V  VCL – GND = -1.0V ~ -3.0V  VCI1 – VCL 6.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 3. Block Diagram Page 8 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 4. Pin Descriptions Pin Name I/O P68 I IM2 I IM1, IM0 Descriptions 8080/6800 MCU Interface mode selection. P68=’1’: select 6800-MCU parallel interface P68=’0’: select 8080-MCU parallel interface If not used, please fix this pin at GND level.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Pin Name ILI9163C Descriptions I/O Tearing effect output pin to synchronies MCU to frame writing, activated by S/W TE O command. When this pin is not activated, this pin is low. If not used, please open this pin. When RCM1,RCM0=’1X’(RGB I/F), serial input/output signal in serial I/F mode. The data is input on the rising edge of the SCL signal. The data is output on the SDA I/O falling edge of the SCL signal.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Pin Name ILI9163C Descriptions I/O If the register is not changed, this H/W pin is always valid. If the register be changed, should be following registers setting. When Power On or H/W reset, this function follow H/W pins setting first.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Pin Name ILI9163C Descriptions I/O Default is internal pull high.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Pin Name ILI9163C Descriptions I/O Output of booster 1 circuit (output of 2-times output of VCI) Connect a capacitor for stabilization. A power supply pin for generating VCOML VCL P GVDD P A standard level for grayscale voltage generator. VGH P Positive power supply for the gate driver. VGL P Negative power supply for the gate driver. Connect a capacitor for stabilization TFT display common electrode power supply.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 5. Pad Arrangement and Coordination 20um 15um 15 um 15um Face Up ( BumpView) 20 um 15um 15 um 1 8 0 1 8 5 8 6 1 Page 14 of 200 . . 1 7 0 ( 4841, - 220) 1 6 0 15um 1 5 0 80 um 15um S 389 S 390 S 391 S 392 S 393 S 394 S 395 S 396 DUMMY 8 DUMMY 7 DUMMY 6 DUMMY 5 G2 G4 G6 G8 1 4 0 15um 10 um 1 3 0 10um 1 2 80um 0 Alignment Mark - Right .
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C VCOM VCOM 7 7 5 5 9 9 DUM MY18 DUM DUM MYMY 17 18 G161 DUM MY17 G159 G 161 G157 G 159 G155 G 157 G153 G 155 G151 G 153 G149 G 151 G147 G 149 G 147 < 10 ohm < 10 ohm . . . . . . . . 1 1 8 8 0 0 < 10 ohm < 10 ohm . < 10 ohm < 10 ohm . < 10 ohm < 10 ohm 1 1 7 7 0 0 < 10 ohm < 10 ohm 0.1uF/ 15V . < 10 ohm . < 10 ohm 1 1 6 6 0 0 < 10 ohm . < 10 ohm . < 10 ohm .
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color No. Name X Y No. Name No. Name 1 Dummy1 -4750 -238.5 61 AGND -1750 -238.5 121 AVDD 1550 -238.5 181 VCOML 4550 -238.5 241 G56 3892 227 2 VDDIO -4700 -238.5 62 AGND -1700 -238.5 122 AVDD 1600 -238.5 182 VCOM 4600 -238.5 242 G54 3876 110 3 EXTC -4650 -238.5 63 RDX -1630 -238.5 123 AVDD 1650 -238.5 183 VCOM 4650 -238.5 243 G52 3860 227 4 GNDO -4600 -238.5 64 D/CX -1570 -238.5 124 AVDD 1700 -238.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color X No. Name X Y No. Name X Y No. Name No. Name X Y No.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color No. Name No. Name X Y No.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C     S1 ~ S396  G1 ~ G162   Input Pad Page 19 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6. Function Description 6.1 MCU Interface Type Selection The selection of a given interfaces are done by setting P68, IM2, IM1, and IM0 pins as show in below tables. Table 6.1.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.2 Serial Interface The Module uses a 3-wire 9-bit serial interface or 4-pins/8-bit bi-directional interface for communication between the micro controller and the LCD driver chip. The 3-pins serial use: CSX (chip enable), SCL(serial clock) and SDA(serial data input/output) and the 4-pins serial use: CSX(chip enable), D/CX(data/ command select), SCL(serial clock), and SDA(serial data input/output). Table 6.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 3-line Serial Interface Protocol S TB TB P CSX Host (MCU to Driver) 0 SDA D7 D6 D5 D4 D3 D2 D1 D0 D/C D7 D6 D5 D4 D3 D2 D1 D0 SCL Command Data / Command / Parameter The CSX can be high level between the data and next command.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color S TB ILI9163C TB P S Host CSX SCL Driver SDA (SDI) D/CX D7 D6 D5 D4 D3 D2 D1 D0 Hi-Z SDA (SDP) Hi-Z D/CX D3 D2 D23 D22 D21 D20 D19 D1 D0 Dummy Clock Cycle Figure4: 3-Pins Serial Protocol (for 04H command: 24-bit read) S TB TB P S Host CSX SCL Driver SDA (SDI) SDA (SDP) D/CX D7 D6 D5 D4 D3 Hi-Z D2 D1 D0 Hi-Z D31 D30 D29 D28 D27 D/CX D3 D2 D1 D0 Dummy Clock Cycle Figure5: 3-Pins Serial
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color TB S ILI9163C P TB S CSX Host (MCU to Driver) SCL 0 D/CX SDA (SDI) Host (Driver to MCU) D7 D6 D5 D4 D3 D2 D1 Hi-Z SDA (SDO) Hi-Z D0 D7 D6 D5 D4 D7 D3 D2 D1 D0 Figure6: 4-pins Serial Protocol (for DAH/DBH/DCH/0AH/0BH/0CH/0DH/0EH/0FH command: 8-bit read) S TB P TB S CSX Host (MCU to Driver) SCL 0 D/CX SDA (SDI) Host (Driver to MCU) D7 D6 D5 D4 D3 D2 D1 Hi-Z SDA (SDO) Hi-Z D0 D23 D22 D21
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.3 8080-Series Parallel Interface (P68=’0’) The MCU uses a 11-wires 8-data parallel interface or 12-wires 9-data parallel interface or 19-wires 16-data parallel interface or 21-wires 18-data parallel interface. The chip-select CSX (active low) enables and disables the parallel interface. RESX (active low) is an external reset signal. WRX is the parallel data write, RDX is the parallel data read and D[17:0] is parallel data.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C WRX D[7:0], D[8:0] or D[15:0], D[17:0] The host asserts D[17:0], D[15:0], D[8:0] or D[7:0] lines when there is falling edge of WRX The display read D[17:0], D[15:0], D[8:0] or D[7:0] lines when there is rising edge of WRX The host negates D[17:0], D[15:0], D[8:0] or D[7:0] lines.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.3.2 Read Cycle/Sequence The read cycle (RDX high-low-high sequence) means that the host reads information from the display via interface. The display sends data (D[17…0]) to the host when there is a falling edge of RDX and the host reads data when there is a rising edge of RDX. RDX D[7:0], D[8:0] or D[15:0], D[17:0] The display asserts D[17:0], D[15:0], D[8:0] or D[7:0] lines when there is a falling edge of RDX.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.4 6800-Series Parallel Interface (P68=’1’) The MCU uses a 11-wires 8-data parallel interface or 12-wires 9-data parallel interface or 19-wires 16-data parallel interface or 21-wires 18-data parallel interface. The chip-select CSX(active low) enables and disables the parallel interface. RESX(active low) is an external reset signal. WRX is the parallel data write, RDX is the parallel data read and D[17:0] is parallel data.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.4.1 Write Cycle/Sequence The write cycle means that the host writes information (command or/and data) to the display via the interface. Each write cycle (E low-high-low sequence) consists of 3 control (D/CX, E, R/WX) and data signals (D[17…0]). D/CX bit is a control signal, which tells if the data is a command or a data. The data signals are a command if the control signal is low (= ‘0’) and vice versa it is data (= ‘1’).
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.4.2 Read Cycle/Sequence The read cycle means that the host reads information (commend or/and data) to the display via the interface. Each read cycle (E low-high-low sequence) consists of 3 control (D/CX, E, R/WX) and data (D[17…0]). D/CX bit is control signal, which tells if the data is a command or a data.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 6.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Break CMD1 PARA11 PARA12 ILI9163C PARA11 is sucessfully sent but the PARA12 is breaked and need to be transferred again CMD2 CMD1 PARA11 PARA12 PARA13 Command 1 with 1st parameter(PARA11) should be executed again to write remained parameter(PARA12 and PARA13) Figure19: Write interrupts recovery (serial interface) Break CMD1 PARA11 PARA11 is sucessfully sent but the other parameters are not sent and break ha CMD2 CMD1 PARA
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.6 Display Data Transfer Pause It will be possible when transferring a Command, Frame Memory Data or Multiple Parameter Data to invoke a pause in the data transmission. If the Chip Select Line is released after a whole byte of a Frame Memory Data or Multiple Parameter Data has been completed, then the Display Module will wait and continue the Frame Memory Data or Parameter Data Transmission from the point where it was paused.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 6.7 ILI9163C Display Data Transfer Mode The data format is described for each interface. Data can be downloaded to the Frame Memory by 2 methods. Method 1: The Image data is sent to the Frame Memory in successive Frame writes, each time the Frame Memory is filled, the Frame Memory pointer is reset to the start point and the next Frame is written.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 6.8 ILI9163C RGB Interface 6.8.1 RGB Interface Selection The RGB interface mode is available for ILI9163C and the interface is selected by setting the VIPF[3:0] bits as following table.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Data Enable (EN) is used to tell when there is received RGB information that should be transferred on the display. This is a high enable and its state is read to the display module by a rising edge of the PCLK signal. D[17:0] are used to tell what is the information of the image that is transferred on the display (When EN= ’1’ and there is a rising edge of PCLK). D[17:0] can be ‘0’ (low) or ‘1’ (high).
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.8.2 RGB Interface Timing The timing chart of 18-/16-bit RGB interface mode is shown as below. 1 frame Front porch Back porch VS VLW>=1H HS PCLK EN D[17:0] HLW>=3DOTCLKs HS 1H PCLK EN DTST>=HLW D[17:0] Valid data VLW : VS Low Width HLW : HS Low Width DTST : Data Transfer Startup Time Figure24: Timing Chart of Signals in 18-/16-bit RGB Interface Mode Page 37 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C The timing chart of 6-bit RGB interface mode is shown as below: 1 frame Front porch Back porch VS VLW>=1H HS PCLK EN D[17:12] HLW>=3DOTCLKs HS 1H PCLK EN D[17:12] DTST>=HLW RG B RG B B R G B Valid data VLW : VS Low Width HLW : HS Low Width DTST : Data Transfer Startup Time Note 1: In 6-bit RGB interface mode, each dot of one pixel (R, G and B) is transferred in synchronization with PCLK.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.8.3 RGB Interface Mode Set ILI9163C supplies a RGB interface with DE mode and can be controlled by external RCM[1:0] pins. RCM1 0 1 1 RCM0 X 0 1 Resolution selection MCU interface mode RGB interface(1) RGB interface(2) There are 2-kinds of RGB mode which is selected by RCM1 & RCM0 hardware pins. In RGB interface 1 : (RCM1, RCM0 = “10”), writing data to frame memory is done by PCLK and Video Data Bus , when DE is high state.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 6.9 ILI9163C Display Data Color Coding 6.9.1 Serial Interface Different display data formats are available for three colors depth supported by the LCM listed below.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Note 1: pixel data with the 16-bits color depth information.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Read data for 3-W SPI RGB RESX IM2 Host 1' 0 SPI4W = 0 , IM[1:0]= xx CSX (SPI CSX) SCL SDA - 0 High-Z SDA Driver High-Z R2Eh D23 D22 D21 D20 D19 D18 D17 D16 D2 D1 D0 D23 D23 D22 D22 D21 D20 D19 1-Pixel data 9 Dummy Clock Read Data format as below D23 D22 D21 D20 R1 5 R1 3 R1 4 R1 2 D19 D18 R1 1 D17 D16 D15 D14 D13 D12 D11 D10 R1 0 - G1 5 - G1 4 R1 3 R1 2 R1 R1 13 R1 0 D9 D8 - - D7
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.9.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C             Note 1: The data order is as follows, MSB=D7, LSB=D0 and picture data is MSB=Bit5, LSB=Bit 0 for Green and MSB=Bit4, LSB=Bit0 for Red and Blue data.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 1 pixel (3 sub-pixels) per 3 transfer RESX IM1/IM0 1 IM1, IM0 = 00 CSX D/CX WRX RDX R/WX 1 8080-Series control pins 6800-Series control pins 0 E D7 0 R1, Bit5 G1, Bit5 B1, Bit5 R2, Bit5 D6 0 R1, Bit4 G1, Bit4 B1, Bit4 R2, Bit4 D5 1 R1, Bit3 G1, Bit3 B1, Bit3 R2, Bit3 D4 0 R1, Bit2 G1, Bit2 B1, Bit2 R2, Bit2 D3 1 R1, Bit1 G1, Bit1 B1, Bit1 R2, Bit1 D2 1 R1, Bit0 G1, Bit0 B1, Bit0 R2, Bi
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.9.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 1 pixel (3 sub-pixels) per 1 transfer, 16-bits/pixel 1 RESX IM1/IM0 IM[1:0] = 01 CSX D/CX WRX 1 RDX 8080-Series control pins 6800-Series control pins 0 R/WX E D15 - R1, Bit4 R2, Bit4 R3, Bit4 R4, Bit4 D14 - R1, Bit3 R2, Bit3 R3, Bit3 R4, Bit3 D13 - R1,Bit2 R2, Bit2 R3, Bit2 R4, Bit2 D12 - R1,Bit1 R2, Bit1 R3, Bit1 R4, Bit1 D11 - R1,Bit0 R2, Bit0 R3, Bit0 R4, Bit0 D10 - G1, Bit5 G2, Bi
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 2 pixels (6 sub-pixels) per 2 transfer, 18-bits/pixel RESX IM1/IM0 1 IM1, IM0 = 01 CSX D/CX WRX RDX R/WX 1 8080-Series control pins 6800-Series control pins 0 E D15 - R1, Bit5 B1, Bit5 G2, Bit5 R3, Bit5 D14 - R1, Bit4 B1, Bit4 G2, Bit4 R3, Bit4 D13 - R1, Bit3 B1, Bit3 G2, Bit3 R3, Bit3 D12 - R1,Bit2 B1, Bit2 G2, Bit2 R3, Bit2 D11 - R1,Bit1 B1, Bit1 G2, Bit1 R3, Bit1 D10 - R1,Bit0 B1, Bit
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.9.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 6.9.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 1 pixel (3 sub-pixels) per 1 transfer, 16-bits/pixel RESX 1 IM1/IM0 IM1, IM0 = 11 CSX D/CX WRX RDX R/WX 1 8080-Series control pins 6800-Series control pins 0 E D17 - D16 - D15 - R1, Bit4 R2, Bit4 R3, Bit4 R4, Bit4 D14 - R1, Bit3 R2, Bit3 R3, Bit3 R4, Bit3 D13 - R1,Bit2 R2, Bit2 R3, Bit2 R4, Bit2 D12 - R1,Bit1 R2, Bit1 R3, Bit1 R4, Bit1 D11 - R1,Bit0 R2, Bit0 R3, Bit0 R4, Bit0 D10 -
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 1 pixel (3 sub-pixels) per 1 transfer, 18-bits/pixel RESX IM1/IM0 1 IM1, IM0 = 11 CSX D/CX WRX RDX R/WX 1 8080-Series control pins 6800-Series control pins 0 E D17 - R1, Bit5 R2, Bit5 R2, Bit5 R2, Bit5 D16 - R1, Bit4 R2, Bit4 R3, Bit4 R4, Bit4 D15 - R1, Bit3 R2, Bit3 R3, Bit3 R4, Bit3 D14 - R1,Bit2 R2, Bit2 R3, Bit2 R4, Bit2 D13 - R1,Bit1 R2, Bit1 R3, Bit1 R4, Bit1 D12 - R1,Bit0 R2, Bit0
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7. Display Data RAM 7.1 Configuration The display data RAM stores display dots and consists of 384,504 bits (132x18x162 bits). There is no restriction on access to the RAM even when the display data on the same address is loaded to DAC. There will be no abnormal visible effect on the display when there is a simultaneous Panel Read and Interface Read or Write to the same location of the Frame Memory.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2 Memory to Display Address Mapping 7.2.1 132RGB x 132 resolution (GM[2:0] = “101”, SMX=SMY=SRGB=’0’) Page 54 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2.2 130RGB x 130 resolution(GM[2:0] = “100”, SMX=SMY=SRGB=’0’) Page 55 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2.3 128RGB x 160 resolution (GM[2:0] = “011”, SMX=SMY=SRGB=’0’) Note RA = Row Address CA = Column Address SA = Scan Address MX = Mirror X-axis (Column address direction parameter), D6 parameter of MADCTL command ML = Scan direction parameter, D4 parameter of MADCTL command RGB = Red, Green and Blue pixel position change, D3 parameter of MADCTL command Page 56 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2.4 120RGB x 160 resolution (GM[2:0] = “010”, SMX=SMY=SRGB=’0’) Note RA = Row Address CA = Column Address SA = Scan Address MX = Mirror X-axis (Column address direction parameter), D6 parameter of MADCTL command ML = Scan direction parameter, D4 parameter of MADCTL command RGB = Red, Green and Blue pixel position change, D3 parameter of MADCTL command Page 57 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2.5 128RGB x 128 resolution (GM[2:0] = “001”, SMX=SMY=SRGB=’0’) Note RA = Row Address CA = Column Address SA = Scan Address MX = Mirror X-axis (Column address direction parameter), D6 parameter of MADCTL command ML = Scan direction parameter, D4 parameter of MADCTL command RGB = Red, Green and Blue pixel position change, D3 parameter of MADCTL command Page 58 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.2.6 132RGB x 162 resolution (GM[2:0] = “000”, SMX=SMY=SRGB=’0’) Note RA = Row Address CA = Column Address SA = Scan Address MX = Mirror X-axis (Column address direction parameter), D6 parameter of MADCTL command ML = Scan direction parameter, D4 parameter of MADCTL command RGB = Red, Green and Blue pixel position change, D3 parameter of MADCTL command Page 59 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 7.3 MCU to memory write/read direction (Address Counter) The address counter set the addresses of the display data RAM for writing and reading. Data is written pixel-wise into the RAM matrix of DRIVER. The data for one pixel or two pixels is collected(RGB 6-6-6-bit), according to the data formats. As soon as this pixel-data information is complete the”Write access” is activated on the RAM.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Figure40: Frame Data Write Direction According to the MADCTR parameters (MV, MX and MY) Display Data Direction MADCTR Parameter MV MX MY Image in the Memory (MPU) H/W position(0,0) B Normal 0 0 Image in the Driver (DDRAM) 0 B X-Y address (0,0) X: CASET Y: RASET E E Y-Mirror 0 0 1 E B X-Mirror 0 1 X-Y address (0,0) X: CASET Y: RASET 1 B 0 E 1 B E H/W position(0,0) B X-Y Exchange 1 0 0 X-Y address
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 8. Tearing Effect Output Line The Tearing Effect output line supplies to the MCU a Panel synchronization signal. This signal can be enabled or disabled by the Tearing Effect Line Off & On commands. The mode of the Tearing Effect Signal is defined by the Parameter of the Tearing Effect Line On command. The signal can be used by the MCU to synchronize Frame Memory Writing when displaying video images. 8.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 8.2 Tearing Effect Line Timing The Tearing Effect signal is described below: tvdl tvdh Vertical Timing Horizontal Timing thdl thdh Table 8.2.1 AC characteristics of Tearing Effect Signal Symbol tvdl tvdh thdl thdh Idle Mode Off/On (Frame Rate = 58.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 8.2.1 Example 1 MCU Write is Faster than Panel Read Data write to Frame Memory is now synchronized to the Panel Scan. It should be written during the vertical sync pulse of the Tearing Effect Output Line. This ensures that data is always written ahead of the panel scan and each Panel Frame refresh has a complete new image: 8.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C pulse of the Tearing Effect Output Line. This allows time for the image to download behind the Panel Read pointer and finishing download during the subsequent Frame before the Read Pointer “catches” the MCU to Frame memory write position. Page 65 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 9. Power ON/OFF Sequence VDDI and VCI can be applied in any order. VCI and VDDI can be powered down in any order. During power off, if LCD is in the Sleep Out mode, VCI and VDDI must be powered down minimum 120msec after RESX has been released. During power off, if LCD is in the Sleep In mode, VDDI or VCI can be powered down minimum 0msec after RESX has been released.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 10sec after both VCI and VDDI have been applied. Note: Unless otherwise specified, timings herein show cross point at 50% of signal/power level. 9.3 Uncontrolled Power Off The uncontrolled power off means a situation when e.g. there is removed a battery without the controlled power off sequence. The display module must meet following requirements: 1.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 10. Power Level Definition 10.1 Power Levels 6 level modes are defined they are in order of Maximum Power consumption to Minimum Power Consumption: 1. Normal Mode On (full display), Idle Mode Off, Sleep Out. In this mode, the display is able to show maximum 262,144 colors. 2. Partial Mode On, Idle Mode Off, Sleep Out. In this mode part of the display is used with maximum 262,144 colors. 3.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 10.2 Power Flow Chart Note 1: There is not any abnormal visual effect when there is changing from one power mode to another power mode. Note 2: There is not any limitation, which is not specified by Nokia, when there is changing from one power mode to another power mode. Note 3: It is recommended that it should be enter Sleep in before power off. Page 69 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 11. Gamma Curves 11.1 Gamma curve according to the Gamma1.0/1.8/2.2/2.5 Page 70 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 11.2 Gamma Structure Page 71 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Positive Gamma Correction Grayscale VP0 VP1 VP2 VP4 VP6 VP13 VP20 VP27 VP36 VP43 VP50 VP57 VP59 VP61 VP62 VP63 Value "X"in Formula VP0[5:0] VP1[5:0] VP2[5:0] VP4[5:0] VP6[5:0] VP13[4:0] VP20[6:0] VP27[3:0] VP36[3:0] VP43[6:0] VP50[4:0] VP57[5:0] VP59[5:0] VP61[5:0] VP62[5:0] VP63[5:0] Input Range 0 - 63 0 - 63 0 - 63 0 - 47 0 - 47 0 - 31 0 - 127 0 - 15 0 - 15 0 - 127 0 - 31 0 - 47 0 - 47 0 - 63 0 - 63 0 - 63 Formula ((130R-X*
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 12. .Reset 12.1 Registers The registers that are initialized are listed below.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Reset Table (Default Value, GM=010, 120RGB x 160) Item After Power On Frame memory Sleep In/Out Display In/Out Display mode(normal/partial) Display Inversion On/Off Display Idle Mode On/Off Column: Start Address(XS) Random In Off Normal Off Off 0000h After Hardware Reset No Change In Off Normal Off Off 0000h After Software Reset Column: end Address(XE) 0077h 0077h Row: Start Address(YS) 0000h 0000h Row: End Address(Y
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Reset Table (Default Value, GM=010, 128RGB x 128) Item After Power On Frame memory Sleep In/Out Display In/Out Display mode(normal/partial) Display Inversion On/Off Display Idle Mode On/Off Column: Start Address(XS) Random In Off Normal Off Off 0000h After Hardware Reset No Change In Off Normal Off Off 0000h After Software Reset Column: end Address(XE) 007Fh 007Fh Row: Start Address(YS) 0000h 0000h Row: End Address(Y
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Reset Table (Default Value, GM=011, 132RGB x 162) Item After Power On Frame memory Sleep In/Out Display In/Out Display mode(normal/partial) Display Inversion On/Off Display Idle Mode On/Off Column: Start Address(XS) Random In Off Normal Off Off 0000h After Hardware Reset No Change In Off Normal Off Off 0000h After Software Reset Column: end Address(XE) 0083h 0083h Row: Start Address(YS) 0000h 0000h Row: End Address(Y
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Reset Table (Default Value, GM=100, 130RGB x 130) Item Frame memory Sleep In/Out Display In/Out Display mode(normal/partial) Display Inversion On/Off Display Idle Mode On/Off Column: Start Address(XS) After Power On Random In Off Normal Off Off 0000h After Hardware Reset No Change In Off Normal Off Off 0000h Column: end Address(XE) 0081h 0081h Row: Start Address(YS) 0000h 0000h Row: End Address(YE) 0081h 0081h GC0 TB
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Reset Table (Default Value, GM=101, 132RGB x 132) Item Frame memory Sleep In/Out Display In/Out Display mode(normal/partial) Display Inversion On/Off Display Idle Mode On/Off Column: Start Address(XS) After Power On Random In Off Normal Off Off 0000h After Hardware Reset No Change In Off Normal Off Off 0000h Column: end Address(XE) 0083h 0083h Row: Start Address(YS) 0000h 0000h Row: End Address(YE) 0083h 0083h GC0 TB
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Note: There will be no output from D[7..0] and SDA during Power On/Off sequences, Hardware Reset and Software Reset. 12.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C RESX Pulse Action Shorten than 5s Reset Rejected Longer than 10s Reset Between 5s and 10s Reset starts (It depends on voltage and temperature condtion.) 2. During the resetting period, the display will be blanked (The display is entering blanking sequence, which maximum time is 120 ms, when Reset Starts in Sleep Out –mode.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 13. SleepOut – Command and Self-Diagnostic Functions of Displap 13.1 Register loading Detection Sleep Out-command (See section 16.1.2.12 Sleep Out (11h)) is a trigger for an internal function of the display module, which indicates, if the display module loading function of factory default values from EEPROM (or similar device) to registers of the display controller is working properly.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 13.2 ILI9163C Functionality Detection Sleep Out-command (See section 16.1.2.12 Sleep Out (11h)) is a trigger for an internal function of the display module, which indicates, if the display module is still running and meets functionality requirements. The internal function (= the display controller) is comparing, if the display module is still meeting functionality requirements (only Booster voltage level).
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14. Command 14.1 Code Command List Command D17-8 D7 D6 D5 D4 D3 D2 D1 D0 Hex Ref. X 0 0 0 0 0 0 0 0 00h 14.2.1 X 0 0 0 0 0 0 0 1 01h 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 10H Sleep In x 0 0 0 1 0 0 0 0 10h 14.2.11 11H Sleep Out x 0 0 0 1 0 0 0 1 11h 14.2.12 12H Partial Mode On x 0 0 0 1 0 0 1 0 12h 14.2.13 13H Normal Display Mode On x 0 0 0 1 0 0 1 1 13h 14.2.14 20H Display Inversion Off x 0 0 1 0 0 0 0 0 20h 14.2.15 21H Display Inversion On x 0 0 1 0 0 0 0 1 21h 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 2EH ILI9163C Memory Read x 0 0 1 0 1 1 1 0 2Eh 1st Parameter x x x x x x x x x - 2nd Parameter x D17 D16 D15 D14 D13 D12 D11 D10 - x 30H 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Frame Rate Control ILI9163C (In 1 0 1 1 0 0 0 1 B1h 1st Parameter x x x DIVA4 DIVA3 DIVA2 DIVA1 DIVA0 x 2nd Parameter x x VPA5 VPA4 VPA3 VPA2 VPA1 VPA0 x 1 0 1 1 0 0 1 0 B2h 1st Parameter x x x DIVB4 DIVB3 DIVB2 DIVB1 DIVB0 x 2nd Parameter x x VPB5 VPB4 VPB3 VPB2 VPB1 VPB0 x 1 0 1 1 0 0 1 1 B3h 1st Parameter x x x DIVC4 DIVC3 DIVC2 DIVC1 DIVC0 x 2nd Parameter x
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Power_Control3 x 1 1 0 0 0 0 1 0 C2h 1st Parameter x 0 0 0 0 0 APA2 APA1 APA0 00h Power_Control4 x 1 1 0 0 0 0 1 1 C3h 1st Parameter x 0 0 0 0 0 APB2 APB1 APB0 00h Power_Control 5 x 1 1 0 0 0 1 0 0 C4h 1st Parameter x 0 0 0 0 0 APC2 APC1 APC1 01h VCOM_Control 1 x 1 1 0 0 0 1 0 1 C5h 1st Parameter x x VMH VMH VMH VMH VMH VMH VMH 6 5 4 3 2
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 3rd Parameter Read ID1 DAH st 0 1 1 0 0 1 1 0 66h x 1 1 0 1 1 0 1 0 x x x x x x x x 54h DA h x x 2nd Parameter x ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 1 1 0 1 1 0 1 1 x x x x x x x x x 1 ID26 ID25 ID24 ID23 ID22 ID21 ID20 80h 1st Parameter 2nd Parameter DCH x 1 Parameter Read ID2 DBH ILI9163C x x x 14.2.34 DB h 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 7th Parameter x th 9 Parameter VN20[6:0] VN36[3:0] 8th Parameter ILI9163C - VN27[3:0] x - VN43[6:0] - th x X VN50[5:0] - st 11 Parameter x x VN57[5:0] - 12nd arameter x x VN59[5:0] - 13rd Parameter x x VN61[5:0] - 14 Parameter x x VN62[5:0] - 15th Parameter x x VN63[5:0] - 1 1 10 Parameter th GAM_R_SEL 1 1 0 0 1 F2H 0 GAM_ st 1 Parameter x x x x x x x R_SEL Page 89 of 200 F2h
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 14.2 ILI9163C Command Description 14.2.1 NOP (00h) 00H Command Parameter NOP (No Operation) D/CX RDX WRX D17-D8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  X 0 0 0 0 0 0 0 0 00 NO PARAMETER This command is an empty command; it does not have any effect on the display module. However it can be used to terminate Frame Memory Write or Read as described in RAMWR (Memory Write) and RAMRD (Memory Read) Description Commands.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.2 Software Reset (01h) 01H Command Parameter SWRESET (Software Reset) D/CX RDX WRX D17-D8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  X 0 0 0 0 0 0 0 1 01 NO PARAMETER When the Software Reset command is written, it causes software reset. It resets the commands and parameters to their S/W Reset default values. (See default tables in each command description.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Serial I/F Mode RDDID(04h) ILI9163C Parallel I/F Mode Legend RDDID(04h) Host Driver command Parameter Dummy Clock Dummy Read Display Action Flow Chart Send ID 1[7:0] Send ID 1[7:0] Mode Sequential transfer Send ID 2[7:0] Send ID 2[7:0] Send ID 3[7:0] Send ID 3[7:0] Page 93 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color PTLON Partial Mode On/Off “1”=On,”0”=Off SLOUT Sleep In/Out “1”=On,”0”=Off NORON Display Normal Mode On/Off “1”=Normal Display, “0”=Normal Display Off VSSON Vertical Scrolling Status “1”=Scroll on,”0”=Scroll off ST14 Horizontal Scroll Status “0” INVON Inversion Status “1”=On, “0”=Off ST12 All Pixels On(Not Used) “0” ST11 All Pixels On(Not Used) “0” DISON Display On/Off “1”=On, “0”=Off TEON Tearing effect line on
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Serial I/F Mode RDDST(09h) ILI9163C Parallel I/F Mode Legend RDDID(09h) Host Driver command Parameter Dummy Clock Dummy Read Display Action Flow Chart Send ST[31:24] Send ST[31:24] Mode Sequential transfer Send ST[23:16] Send ST[23:16] Send ST[15:8] Send ST[15:8] Send ST[7:0] Send ST[7:0] Page 96 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.11 Sleep In (10h) 10H Command Parameter SLPIN (Sleep In) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 0 1 0 0 0 0 10h No Parameter This command causes the LCD module to enter the minimum power consumption mode. Description In this mode e.g. the DC/DC converter is stopped, Internal oscillator is stopped, and panel scanning is stopped.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.12 Sleep Out (11h) 11H Command SLPOUT (Sleep Out) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 0 1 0 0 0 1 11h Parameter No Parameter Descriptio n This command turns off sleep mode. In this mode e.g. the DC/DC converter is enabled, Internal oscillator is started, and panel scanning is started. This command has no effect when module is already in sleep out mode.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command SPLOUT Display whole blank screen for 2 frames (Automatic No effect to DISP ON/OFF Commands) Parameter Display Action Start Internal Oscillator Mode Display Memory contents in accordance with the current command table settings Sequential transfer Start DC-DC Converter Sleep In Mode Charge Offset voltage for LCD Panel Page 105 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.13 Partial Mode On (12h) 12H Command Parameter PTLON (Partial Mode On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 0 1 0 0 1 0 12h No Parameter This command turns on partial mode. The partial mode is described by the Partial Area command (30h). To leave Partial mode, the Normal Display On command (13h) should be written.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.14 Normal Display Mode On (13h) 13H Command Parameter PTLON (Partial Mode On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 0 1 0 0 1 1 13h No Parameter This command returns the display to normal mode. Normal display mode on means Partial mode off and Scroll mode Off.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.15 Display Inversion Off (20h) 20H PTLON (Partial Mode On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX Command 0 1  x 0 0 1 0 0 0 0 0 20h Parameter No Parameter This command is used to recover from display inversion mode. This command makes no change of contents of frame memory. This command does not change any other status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.16 Display Inversion On (21h) 21H Command Parameter PTLON (Partial Mode On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 0 0 0 0 1 21h No Parameter This command is used to enter into display inversion mode. This command makes no change of contents of frame memory. Every bit is inverted from the frame memory to the display. This command does not change any other status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.17 Gamma Set (26h) 26H GAMSET (Gamma Set) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 Command 0 1  x 0 0 1 0 0 1 1 0 HEX 26h Parameter 1 1  x GC7 GC6 GC5 GC4 GC3 GC2 GC1 GC0 01h This command is used to select the desired Gamma curve for the current display. A maximum of 4 fixed gamma curves can be selected. The curves are defined Gamma Curve Correction Power Supply Circuit.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.18 Display Off (28h) 28H Command Parameter DISPOFF (Display Off) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 0 1 0 0 0 28h No Parameter This command is used to enter into DISPLAY OFF mode. In this mode, the output from Frame Memory is disabled and blank page inserted. This command makes no change of contents of frame memory. This command does not change any other status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend Display On Mode command Parameter Display DISPOFF(28h) Action Mode Display Off Mode Sequential transfer Page 112 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.19 Display On (29h) 29H DISPON (Display On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX Command 0 1  x 0 0 1 0 1 0 0 1 29h Parameter No Parameter This command is used to recover from DISPLAY OFF mode. Output from the Frame Memory is enabled. This command makes no change of contents of frame memory. This command does not change any other status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend Display On Mode command Parameter Display DISPON(29h) Action Mode Display Off Mode Sequential transfer Page 114 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color (Parameter range: 0 XS[15:0] XE[15:0] ILI9163C 127(00A1h):MV=”1”) X = Don’t care Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Register Normal Mode On, Idle Mode On, Sleep Out Yes Availability Partial Mode On, Idle Mode Off, Sleep Out Yes Partial Mode On, Idle Mode On, Sleep Out Yes Sleep In Yes 1.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C CASET (2Ah) 1st &2nd Parameter XS[15:0] 3rd & 4thparmeter XE[15:0] Legend command RASET (2Bh) Parameter If Needed Display Flow Chart 1st &2nd Parameter YS[15:0] 3rd & 4thparmeter YE[15:0] Action Mode Sequential transfer RAMWR(2Ch) Image Data D1[17:0],D2[17:0]..Dn[17:0] Any Commend Page 117 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color (Parameter range: 0 YS[15:0] YE[15:0] 161(00A1h)):MV=”0” (Parameter range: 0 YS[15:0] YE[15:0] 131(0083h)):MV=”1” ILI9163C X = Don’t care Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Register Normal Mode On, Idle Mode On, Sleep Out Yes Availability Partial Mode On, Idle Mode Off, Sleep Out Yes Partial Mode On, Idle Mode On, Sleep Out Yes Sleep In Yes 1.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Partial Mode CASET (2Ah) 1st &2nd Parameter XS[15:0] 3rd & 4thparmeter XE[15:0] RASET (2Bh) If Needed Flow Chart 1st &2nd Parameter YS[15:0] 3rd & 4thparmeter YE[15:0] Legend command Parameter RAMWR(2Ch) Display Action Image Data D1[17:0],D2[17:0]..Dn[17:0] Mode Sequential transfer Any Commend Page 120 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.22 Memory Write (2Ch) 2CH RAMWR (Memory Write) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX Command 0 1  x 0 0 1 0 1 1 0 0 2Ch 1st Parameter 1 1  D17-8 D7 D6 D5 D4 D3 D2 D1 D0 - 1 1  x 1 1  D17-8 D7 D6 D5 D4 D3 D2 D1 D0 - NTH Parameter This command is used to transfer data from MCU to frame memory. This command makes no change to the other driver status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Default ILI9163C Status Default Value Power On Sequence Contents of memory is set randomly SW Reset Contents of memory is not cleared HW Reset Contents of memory is not cleared Legend CASET (2Ah) command Parameter Image Data D1[17:0],D2[17:0]..Dn[17:0] Display Flow Chart Action Mode Any Commend Sequential transfer Page 122 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.24 Memory Read (2Eh) 2EH RAMRD (Memory Read) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX Command 0 1  x 0 0 1 0 1 1 1 0 2Eh 1st Parameter 1  1 x x x x x x x x x x 2nd Parameter 1  1 x D17 D16 D15 D14 D13 D12 D11 D10 x 1  1 x 1  1 x Dn7 Dn6 Dn5 Dn4 Dn3 Dn2 Dn1 Dn0 Nth Parameter x x This command is used to transfer data from frame memory to MCU.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Partial Area Start Row PSL[15:0] Non-Display Area End Row PEL[15:0] Partial Area If End Row = Start Row then the Partial Area will be one row deep.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C The condition is (TFA+VSA+BFA)=128 in 128RGBx128 (GM=”001”) The condition is (TFA+VSA+BFA)=130 in 130RGBx130 (GM=”100”) The condition is (TFA+VSA+BFA)=132 in 132RGBx132 (GM=”101”) Restriction The condition is (TFA+VSA+BFA)=160 in 128RGBx160 (GM=”011”) or 120RGBx160(GM=”010”) The condition is (TFA+VSA+BFA)=162 in 132RGBx162(GM=”000”) Otherwise Scrolling mode is undefined.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Normal Mode ILI9163C Legend command SCRLAR (33h) Parameter Display 1st & 2nd parameter : TFA[15:0] Action Mode 3rd & 4th Parameter VSA[15:0] Sequential transfer 5th & 6th Parameter BFA[15:0] CASET(2Ah) 1st & 2nd parameter : XS[15:0] 3rd & 4th Parameter XE[15:0] Redefines the Frame Memory Window that the scroll data will be written to see Note CASET(2Bh) 1st & 2nd parameter : YS[15:0] 3rd & 4th Parameter YE[15:0] MADCTR(36h) P
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Note 1 The Frame Memory Window size must be defined correctly otherwise undesirable image will be displayed. 2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Scroll Mode (Optional) To prevent Tearing Effect Image Display DISOFF(28h) MORON(12h)/PTLON(12h) Scroll Mode Off RAMRW(2Ch) Image Data D1[17:0],D2[17:0]...Dn[17:0] DISON(29h) Note2: Scroll Mode can be left by both the Normal Display Mode On (13h) and Partial Mode On (12h) commands. Page 131 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.27 Tearing Effect Line Off (34h) 34H Command Parameter TEOFF (Tearing Effect Line OFF) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 0 1 0 0 34h NO PARAMETER Description This command is used to turn OFF (Active Low) the Tearing Effect output signal from the TE signal line. Restriction This command has no effect when Tearing Effect output is already OFF.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.28 Tearing Effect Line On (35h) 35H Command 1st Parameter TEON (Tearing Effect Line ON) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 0 1 0 1 35h 1 1  x x x x x x x x M 00h This command is used to turn ON the Tearing Effect output signal from the TE signal line. This output is not affected by changing MADCTL bit ML.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend TE Line Output OFF command Parameter TEON(35h) Display Flow Chart 1st parameter: (M) Action Mode TE Line Output ON Page 134 of 200 Sequential transfer Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.29 Memory Access Control (36h) 36H Command 1st Parameter MADCTL (Memory Access Control) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 0 1 1 0 36h 1 1  x MY MX MV ML RGB MH x x 00h This command defines read/write scanning direction of frame memory. This command makes no change on the other driver status.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C B3 = 0 Memory R G B Sent RGB Display Panel R G B B3 = 1 Memory R Restriction G B Sent BGR Display Panel B G R -D1 and D0 of the 1st parameter are set to “00” internally.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Default ILI9163C Status Default Value Power On Sequence MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 SW Reset No Change HW Reset MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 Legend command Parameter MADCTR(36h) Display Flow Chart 1st parameter: (MY, MX, MV, ML, RGB, MH) Action Mode Sequential transfer Page 137 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Register Normal Mode On, Idle Mode On, Sleep Out Yes Availability Partial Mode On, Idle Mode Off, Sleep Out Yes Partial Mode On, Idle Mode On, Sleep Out Yes Sleep In Yes Status Default Flow Chart ILI9163C Default Value Power On Sequence 0000h SW Reset 0000h HW Reset 0000h See Vertical Scrolling Definition (33h) description. Page 139 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.31 Idle Mode Off (38h) 38H IDMOFF (Idle Mode Off) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 1 0 0 0 38h Command Parameter NO PARAMETER This command is used to recover from Idle mode on. There will be no abnormal visible effect on the display mode change transition. Description In the Idle off mode 1. LCD can display maximum 4096, 65K, 262K colors. 2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.32 Idle Mode On (39h) 39H IDMON (Idle Mode On) Command Parameter D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 1 0 0 1 39h NO PARAMETER This command is used to enter into Idle mode on. There will be no abnormal visible effect on the display mode change tranition. In the Idle mode, 1. Color expression is reduced.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend Idle mode off command Parameter Display IDMOFF(39h) Action Mode Idle mode on Sequential transfer Page 142 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.33 Interface Pixel Format (3Ah) 39H Command 1st Parameter IDMON (Idle Mode On) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 0 0 1 1 1 0 1 0 3Ah 1 1  x VIPF3 VIPF2 VIPF1 VIPF0 D3 IFPF2 IFPF1 IFPF0 66h This command is used to define the format of RGB picture data, which is to be transferred via the MCU interface.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend 18-bit/Pixel Mode command Parameter COLMOD(3Ah) Display Flow Chart 1st parameter: IFPF[2:0] = xxx Action Mode 18-bit/Pixel Mode Sequential transfer Page 144 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color (1) When GM=000(132*162), GM=011(128*160) or GM=010(120*160) Default Value Status Default (2) ILI9163C DIVA[4:0] VPA[5:0] Power On Sequence 0Eh/14d 14h/20d S/W Reset 0Eh/14d 14h/20d H/W Reset 0Eh/14d 14h/20d When GM=001(128*128), GM=100(130*130), GM=101(132*132) Default Value Status DIVA[4:0] VPA[5:0] Power On Sequence 11h/17d 11h/17d S/W Reset 11h/17d 11h/17d H/W Reset 11h/17d 11h/17d Legend RGBCTR1(B1h) co
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.38 Frame Rate Control(In Idle mode/8-colors) (B2h) B2h Frame Rate Control(In Idle mode/Full colors) D/CX RDX WRX D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  1 0 1 1 0 0 1 0 B2h 1  x x x DIVB4 DIVB3 DIVB2 DIVB1 DIVB0 x 1  x x VPB5 VPB4 VPB3 VPB2 VPB1 VPB0 x Command 1st 1 Parameter 2 nd 1 Parameter Sets the division ratio for internal clocks of Idle mode at CPU interface mode.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color (1) When GM=000(132*162), GM=011(128*160) or GM=010(120*160) Default Value Status Default (2) ILI9163C DIVB[4:0] VPB[5:0] Power On Sequence 0Eh/14d 14h/20d S/W Reset 0Eh/14d 14h/20d H/W Reset 0Eh/14d 14h/20d When GM=001(128*128), GM=100(130*130), GM=101(132*132) Default Value Status DIVB[4:0] VPB[5:0] Power On Sequence 11h/17d 11h/17d S/W Reset 11h/17d 11h/17d H/W Reset 11h/17d 11h/17d Legend command FRMCTR2(B
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command FRMCTR2(B3h) Parameter Display Flow Chart 1st parameter: DIVC[4:0] 2nd parameter: VPC[4:0] Action Mode Sequential transfer Page 150 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Default Value Status Default HBP[5:0] VBP[9:0] Power On Sequence 08h 03h S/W Reset 08h 03h H/W Reset 08h 03h Legend command BPCTR(B5h) Parameter Display Flow Chart Action 1st parameter: HBP[5:0] 2nd parameter: VBP[5:0] 3rd parameter: VBP[9:8] Mode Sequential transfer Page 153 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.43 Display Fuction set 5 (B6h) B6h RGB Interface Blanking Porch setting D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX Command 0 1  x 1 0 1 1 0 1 1 0 B6h 1st 1 1  x 0 0 NO1 NO0 SDT1 SDT0 EQ1 EQ2 07h 1 1  x 0 0 0 0 0 PTG0 PT1 PT0 02h 2nd -1st parameter: Set output waveform relation.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C -PT[1:0]: Determine Source/VCOM output in a non-display area in the partial mode PT[1:0] Restriction Source output on VCOM output on non-display area non-display area Positive Negative Positive Negative V63 V0 VCOMH VCOML V0 V63 VCOMH VCOML AGND AGND AGND AGND Hi-z AGND AGND 00 0 01 1 10 2 11 3 Hi-z If this register not using the register need be reserved.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command PWCTR1(C0h) Parameter Display Flow Chart Action 1st Parameter: VRH[4:0] Mode Sequential transfer Page 159 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.45 Power_Control2 (C1h) C1H Command 1st Parameter Power_Control 2 D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 1 1 0 0 0 0 0 1 C1h 1 1  x 0 0 0 0 0 BT2 BT1 BT0 05h Set the AVDD, VCL, VGH and VGL supply power level. BT[2:0] Description AVDD VCL VGH VGL 010 2 2xVCI -1xVCI1 2.5xAVDD -2.5xAVDD 011 3 2xVCI -1xVCI1 3xAVDD -2.5xAVDD 100 4 2xVCI -1xVCI1 2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.46 Power_Control 3 (C2h) C2H Command 1st Parameter Power_Control 3 D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 1 1 0 0 0 0 1 0 C2h 1 1  x 0 0 0 0 0 APA2 APA1 APA0 00h Set the amount of current in Operation amplifier in normal mode/full colors. Adjust the amount of fixed current from the fixed current sources in the operational amplifier for the source driver.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Register Normal Mode On, Idle Mode On, Sleep Out Yes Availability Partial Mode On, Idle Mode Off, Sleep Out Yes Partial Mode On, Idle Mode On, Sleep Out Yes Sleep In Yes Status Default Default Value nVM VMH[6:0] VML[6:0] Power On Sequence 0d 67d 77d SW Reset 0d 67d 77d HW Reset 0d 67d 77d Legend command VMCTR(C5h) Parameter Display F
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command VMOFCTR(C7h) Parameter Display Flow Chart Action 1st Parameter: nVM, VMF[6:0] Mode Sequential transfer Page 167 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color Serial I/F Mode Parallel I/F Mode ILI9163C Legend command RDID4(D3h) RDID4(D3h) Host Driver Dummy Clock Dummy Read Parameter Display Action Mode Flow Chart Send ID41[7:0] Send ID41[7:0] Send ID42[7:0] Send ID42[7:0] Send ID43[7:0] Send ID43[7:0] Send ID4N[7:0] Send ID4N[7:0] Page 169 of 200 Sequential transfer Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.53 NV Memory Function Controller(1) (D5h) D5H Command 1st Parameter 2nd Parameter NV Memory Function Controller1 D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 1 1 0 1 1 0 1 0 D5h 1 1  x ID33 ID32 ID31 ID30 ID23 ID22 ID21 ID20 00h 1 1  x 0 0 0 OTP_ BS OTP_ OTP_ OTP_ OTP_ VMF3 VMF2 VMF1 VMF0 00h -ID2,ID3,and VMF can be written four times.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 2nd Parameter OTP_VMF Times VMF3 VMF2 VMF1 VMF0 st 0 0 0 1 2nd 0 0 1 1 3rd 0 1 1 1 4th 1 1 1 1 1 -Parameter 1 bit[7:4] : ID3 Mark bit default by OTP bit[3:0] : ID2 Mark bit default by OTP bit[7] : OTP Busy status 1'b0 bit[6:4] : None 3'd0 bit[3:0] : VMF Mark bit default by OTP -Parameter 2 MTP write EPWRITE command Please see MTP Access sequence for program(Data write) for more detail Stat
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.34 Read ID1 (DAh) DAH Command 1st Parameter 2nd Parameter RDID1 (Read ID1) D/CX RDX WRX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX 0 1  x 1 1 0 1 1 0 1 0 DAh x x x x x x x x ID16 ID15 ID14 ID13 ID12 ID11 ID10 54h 1 1   1 x x 1 x ID17 This read byte return 8-bit LCD module’s ID.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command GAMCTRP0(E0h) Parameter Display Flow Chart 1st Parameter 2nd Parameter : : 9th Parameter Action Mode Sequential transfer Page 178 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Legend command GAMCTRN0(E1h) Parameter Display Flow Chart 1st Parameter 2nd Parameter : : 9th Parameter Action Mode Sequential transfer Page 180 of 200 Version:0.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 14.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 15. Example Connection with Panel direction and Different Resolution 15.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Case 2: st 1 Pixel is at Left Top of the panel RGB filter order = BGR G161 Driver IC ( Bump down) S7 S390 G3 00h 01h 02h __ __ __ __ 7Dh 7Eh G160 - Direction default setting(H/W) SMX = 0 SMY = 0 SRGB = 1 G2 7Fh G1 G2 S1 = Filter B S2 = Filter G S3 = Filter R 1st Pixel G3 G4 - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY -XY- Exchange control by MV IC (Bump down) LCD Front
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C Case 4: st 1 Pixel is at Right-Bottom of the panel RGB filter order = “BGR” G161 Driver IC ( Bump down) S7 S390 G3 00h 01h 02h __ __ __ __ 7Dh 7Eh G160 - Direction default setting(H/W) SMX = 0 SMY = 0 SRGB = 1 G2 7Fh G1 G2 1st Pixel G3 G4 S1 = Filter B S2 = Filter G S3 = Filter R - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY -XY- Exchange control by MV IC (Bump down) LCD Fr
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 15.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 2) Example for SMX=SMY=’1’ G133 GRAM size(132x132x18-bits) 00h 01h 02h __ __ 76h __ 77h 82h S1 S396 83h 00h 000h G132 Driver IC ( Bump down) G3 01h 02h __ __ __ 76h G2 __ 77h 82h 83h G1 001h (0,0) (131,131) 002h G2 G2 G4 G4 G3 (131,131) G129 9DH G158 G130 9EH 1st Pixel G131 9FH G132 (0,0) Unused area - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY -
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 2) Example for SMX=SMY=’1’ G131 GRAM size(130x130x18-bits) 00h 01h 02h __ __ 76h 77h __ 80h 001h S7 81h 00h 000h G130 Driver IC ( Bump down) G3 01h 02h S396 __ __ __ 76h 77h __ G2 80h 81h G1 (0,0) (129,129) 002h G2 G2 G4 G4 G3 (129,129) G127 9DH G158 G128 9EH G129 1st Pixel 9FH G130 (0,0) Unused area - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY - XY
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color G161 GRAM size(128x160x18-bits) 00h 01h 02h __ __ __ __ 7Dh ILI9163C G160 Driver IC ( Bump down) G3 S7 S390 G2 (0,0) 7Eh 7Fh 00h 000h 01h __ __ __ __ 02h 7Dh 7Eh 7Fh G1 001h (0,0) G2 1st Pixel 002h G3 G4 G157 9DH G158 9EH G159 9FH G160 (127,159) (127,159) - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY - XY- Exchange control by MV - Direction default setting (H/W) SMX
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color G161 GRAM size(120x160x18-bits) 00h 01h 02h __ __ __ 76h 77h __ S7 S366 G2 (0,0) 7Eh 7Fh 00h 000h 001h G160 Driver IC ( Bump down) G3 ILI9163C 01h 02h __ __ __ __ 75h 76h 77h G1 (0,0) G2 1st Pixel 002h G3 G4 G157 9DH (119,159) G158 9EH G159 9FH G160 (119,159) Unused area - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY - XY- Exchange control by MV - Direction defaul
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color G129 GRAM size(128x128x18-bits) 00h 01h 02h __ __ 76h __ 77h ILI9163C G128 Driver IC ( Bump down) G3 S7 S390 G2 (0,0) 7Eh 7Fh 00h 000h 01h 02h __ __ __ 76h 77h __ 7Eh 7Fh G1 001h (0,0) 1st Pixel 002h G2 G2 G4 G4 G3 (127,127) G125 9DH G158 G126 9EH G127 9FH G128 Unused area (127,127) - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY - XY- Exchange control by MV
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color G161 GRAM size(132x162x18-bits) 00h 01h 02h __ __ __ __ __ __ 81h 82h 83h (0,0) G162 Driver IC ( Bump down) G1 000h ILI9163C S1 00h 01h 02h S396 __ __ __ __ 81h G2 82h 83h G1 001h (0,0) 1st pixel 002h G2 G2 G4 G4 G3 G159 9FH G160 A0H G161 A1H G162 (131,161) (131,161) - Display direction control (S/W) - X- Mirror control by MX - Y- Mirror control by MY - XY- Exchange control by MV - Direction default s
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 16. OTP Programming Flow S ta rt C o n n e c t e x te rn a l p o w e r 6 .
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 17. Electrical Characteristics 17.1 Absolute Maximum Ratings The absolute maximum rating is listed on following table. When ILI9163C is used out of the absolute maximum ratings, the ILI9163C may be permanently damaged. To use the ILI9163C within the following electrical characteristics limit is strongly recommended for normal operation.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C VCOM High voltage VCOMH V Ccom=12nF 2.5 5.0 Note 3 VCOM Low voltage VCOML V Ccom=12nF -2.5 0.0 Note 3 VOMA V 4.0 5.5 Note 3 Vsout V 0.1 AVDD-0.1 Note4 GVDD V 3.0 5.0 Note3 VCOM Amplitude voltage VCOMH-VCOML Source Driver Source output range Gamma voltage reference Note 1: VDDI=1.65 to 3.3V, VCI=2.5 to 4.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 17.3 ILI9163C AC Characteristics 17.3.1. Parallel CPU 18/16/9/8-bit Bus Note: Logic high and low levels are specified as 30% and 70% of VDDI for Input signals. Table 17.3.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color trdh Control pulse H duration(ID) 90 ns trdl Control pulse L duration(ID) 45 ns Read cycle (FM) 450 ns trdhfm Control pulse H duration (FM) 90 ns trdlfm Control pulse L duration (FM) 355 ns tdst Data setup time 10 ns tdht Data hold time 10 ns trat Read access time (ID) 40 ns tratfm Read access time (FM) 340 ns 80 ns trcfm RDX ILI9163C D[17..
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 17.3.2. Display Serial Interface (SPI) 17.3.2.1 3-pin Serial Interface Table 17.3.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color 17.3.2.2 ILI9163C 4-pin Serial Interface Table 17.3.2.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 17.3.3. Parallel RGB 18/16/6-bit Bus Signal Symbol TPCLKCYC PCLK VS HS DE D[17:0] Parameter MIN TPCLK Cycle time MAX 66 Unit ns TPCLKLT Pixel low pulse width 15 - ns TPCLKHT Pixel high pulse width 15 - ns TVSST Vertical Sync. setup time 15 - ns TVSHT Vertical Sync. hold time 15 - ns THSST Horizontal Sync. setup time 15 - ns THSHT Horizontal Sync.
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a-Si TFT LCD Single Chip Driver 132RGBx162 Resolution and 262K color ILI9163C 18. Revision History Version No. Date V0.01 2009/12/28 V0.02 2010/2/2 130 V0.03 2010/2/26 179 V0.04 2010/3/24 191~197 AC/DC timing revise 43 modify type error in Figure 31 101 Sleep out description 10 Modify SMX/SMY decription 157 Modify C1h default vaule 14 Modify Au bump hight and remove 400um chip thickness V0.05 2010/3/31 Page Description New Created Tearing effect description V0.