Data Sheet

MPU-9250 Product Specification
Document Number: PS-MPU-9250A-01
Revision: 1.0
Release Date: 01/17/2014
3.5 I2C Timing Characterization
Typical Operating Circuit of section 4.2
, VDD = 2.4V to 3.6V, VDDIO = 1.71 to VDD, T
A
=2C, unless
otherwise noted.
Parameters
Conditions
Min
Typical
Max
Units
Note s
I
2
C TIMING
I
2
C FAST-MODE
f
SCL
, SCL Clock Frequency
400
kHz
t
HD.STA
, (Repeated) START Condition Hold
Time
0.6
µs
t
LOW
, SCL Low Period
1.3
µs
t
HIGH
, SCL High Period
0.6
µs
t
SU.STA
, Repeated START Condition Setup
Time
0.6
µs
t
HD.DAT
, SDA Data Hold Time
0
µs
t
SU.DAT
, SDA Data Setup Time
100
ns
t
r
, SDA and SCL Rise Time
C
b
bus cap. from 10 to 400pF
20+0.1C
b
300
ns
t
f
, SDA and SCL Fall Time
C
b
bus cap. from 10 to 400pF
20+0.1C
b
300
ns
t
SU.STO
, STOP Condition Setup Time
0.6
µs
t
BUF
, Bus Free Time Betw een STOP and
START Condition
1.3
µs
C
b
, Capacitive Load for each Bus Line
< 400
pF
t
VD.DAT
, Data Valid Time
0.9
µs
t
VD.ACK
, Data Valid Acknowledge Time
0.9
µs
Table 6 I
2
C Timing Characteristics
Notes:
Timing Characteristics apply to both Primary and Auxiliary I2C Bus
Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in
sockets
I
2
C Bus Timing Diagram
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