Datasheet
Table Of Contents
- Title
- Contents
- 1 Functional description
- 2 System description
- 3 Pin definition
- 4 Electrical specification
- 5 Communications interfaces
- 6 Mechanical specification
- 7 Reliability tests and approvals
- 8 Labeling and ordering information
- Related documents
- Revision history
- Contact
ZED-F9T-Data sheet
3 Pin definition
3.1 Pin assignment
The pin assignment of the ZED-F9T module is shown in Figure 2. The defined configuration of the
PIOs is listed in Table 8.
For detailed information on pin functions and characteristics, see the u-blox ZED-F9T Integration
manual [1].
The ZED-F9T is an LGA package with the I/O on the outside edge and central ground pads.
Figure 2: ZED-F9T pin assignment
Pin no. Name I/O Description
1 GND - Ground
2 RF_IN I RF input
3 GND - Ground
4 ANT_DETECT I Active antenna detect - default active high
5 ANT_OFF O External LNA disable - default active high
6 ANT_SHORT_N I Active antenna short detect - default active low
7 VCC_RF O Voltage for external LNA
UBX-18053713 - R06
3 Pin definition Page 9 of 23
C1-Public Early production information