Datasheet

NEO-M9N-Data sheet
Figure 4: NEO-M9N module SPI specification mode 1: CPHA=0 SCK = 5.33 MHz
Timings 1 - 12 are not specified here.
Timing value at 2 pF load Min (ns) Max (ns)
"A" - MISO data valid time (CS) 14 38
"B" - MISO data valid time (SCK) weak driver mode 21 38
"C" - MISO data hold time 114 130
"D" - MISO rise/fall time, weak driver mode 1 4
"E" - MISO data disable lag time 20 32
Table 14: NEO-M9N SPI timings at 2pF load
Timing value at 20 pF load Min (ns) Max (ns)
"A" - MISO data valid time (CS) 19 52
"B" - MISO data valid time (SCK) weak driver mode 25 51
"C" - MISO data hold time 117 137
"D" - MISO rise/fall time, weak driver mode 6 16
"E" - MISO data disable lag time 20 32
Table 15: NEO-M9N SPI timings at 20pF load
Timing value at 60 pF load Min (ns) Max (ns)
"A" - MISO data valid time (CS) 29 79
"B" - MISO data valid time (SCK) weak driver mode 35 78
"C" - MISO data hold time 122 152
"D" - MISO rise/fall time, weak driver mode 15 41
"E" - MISO data disable lag time 20 32
Table 16: NEO-M9N SPI timings at 60pF load
5.3 Slave I2C interface
An I2C compliant interface is available for communication with an external host CPU. The interface
can be operated in slave mode only. It is fully compatible with Fast-Mode of the I2C industry
standard. Since the maximum SCL clock frequency is 400 kHz, the maximum bit rate is 400 kbit/
UBX-19014285 - R02
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5 Communications
interfaces
Page 13 of 21
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