Datasheet

NEO-M9N-Data sheet
5 Communications interfaces
There are several communications interfaces including UART, SPI, I2C
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and USB.
All the inputs have internal pull-up resistors in normal operation and can be left open if not used.
All the PIOs are supplied by VCC, therefore all the voltage levels of the PIO pins are related to VCC
supply voltage.
5.1 UART interface
There is one UART interface: UART1, which operates up to and including a speed of 921600 baud.
No hardware flow control is supported.
UART1 is enabled by default if D_SEL = 1 or unconnected.
Figure 3: NEO-M9N module UART timing specifications
Symbol Parameter Min Max Unit
t
ECH
High period of external data input 0 0.4 µs
t
ECL
LOW period of external data input TBA TBA µs
R
u
Baudrate 4800 921600 bd
t
CR
Rise time of data 5 ns
t
CF
Fall time of data 5 ns
Table 13: NEO-M9N UART timings and specifications
5.2 SPI interface
The NEO-M9N has an SPI slave interface that can be selected by setting D_SEL = 0. The SPI pins
available are: SPI_MISO (TXD), SPI_MOSI (RXD), SPI_CS_N, SPI_CLK. The SPI interface is designed
to allow communication to a host CPU. The interface can be operated in slave mode only. Note that
SPI is not available in the default configuration because its pins are shared with the UART and I2C
interfaces. The maximum transfer rate using SPI is 125 kB/s and the maximum SPI clock frequency
is 5.5 MHz.
This section provides SPI timing values for the NEO-M9N slave operation. The following tables
present timing values under different capacitive loading conditions. Default SPI configuration is
CPOL = 0 and CPHA = 0.
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I2C is a registered trademark of Philips/NXP
UBX-19014285 - R02
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5 Communications
interfaces
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