Datasheet

Table Of Contents
NEO-M8U - Data Sheet
UBX-15015679 - R06 Functional description Page 12 of 27
Product Information
1.16 Protocols and interfaces
Protocol Type
NMEA 0183 V4.0 (V2.1, V2.3 and V4.1 configurable) Input/output, ASCII
UBX Input/output, binary, u-blox proprietary
RTCM Input, messages 1, 2, 3, 9
Table 4: Available Protocols
All protocols are available on UART, USB, DDC (I
2
C compliant) and SPI. For specification of the various
protocols see the
u-blox 8 /
u-blox M8 Receiver Description Including Protocol Specification
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Reference source not found..
1.17 Interfaces
A number of interfaces are provided for data communication. The embedded firmware uses these
interfaces according to their respective protocol specifications.
1.17.1 UART
The NEO-M8U module includes one UART interface, which can be used for communication to a host.
It supports configurable baud rates. For supported baud rates see the
u-blox 8 / u-blox M8 Receiver
Description Including Protocol Specification
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Designs must allow access to the UART and the SAFEBOOT_N function pin for future service,
updates and reconfiguration.
1.17.2 USB
A USB interface, which is compatible to USB version 2.0 FS (Full Speed, 12 Mbit/s), can be used for
communication as an alternative to the UART. The pull-up resistor on pin USB_DP is integrated to
signal a full-speed device to the host. The VDD_USB pin supplies the USB interface. The u-blox USB
(CDC-ACM) driver supports Windows Vista plus Windows 7 and 8 operating systems. A separate
driver (CDC-ACM) is not required for Windows 10 which has a built-in USB-serial driver. However,
plugging initially into an internet connected Windows 10 PC, will down-load the u-blox combined
sensor and VCP driver package.
USB drivers can be down-loaded from the u-blox web site, www.u-blox.com.
1.17.3 SPI
The SPI interface is designed to allow communication to a host CPU. The interface can be operated in
slave mode only. The maximum transfer rate using SPI is 125 kB/s and the maximum SPI clock
frequency is 5.5 MHz, see Figure 3. Note that SPI is not available in the default configuration, because
its pins are shared with the UART and DDC interfaces. The SPI interface can be enabled by connecting
D_SEL (Pin 2) to ground (see section 3.1).
1.17.4 Display Data Channel (DDC)
An I
2
C compliant DDC interface is available for communication with an external host CPU or u-blox
cellular modules. The interface can be operated in slave mode only. The DDC protocol and electrical
interface are fully compatible with Fast-Mode of the I
2
C industry standard. Since the maximum SCL
clock frequency is 400 kHz, the maximum transfer rate is 400 kb/s.
1.18 Clock generation
1.18.1 Oscillators
The NEO-M8U GNSS module uses a crystal-based oscillator.