User Manual

ZED-F9P-Data Sheet
UBX-17051259 - R02

5 Communications
interfaces
Page 15 of 24
Advance Information
Figure 4: ZED-F9P high precision receiver SPI specification Mode 1: CPHA=0 SCK = 5.33 MHz
Timings 1 - 12 are not specified here.
Timing value @ 2 pF load Min (ns) Max (ns)
MISO data valid time (CS) - "A" 14 38
MISO data valid time (SCK) weak driver mode - "B" 21 38
MISO data hold time - "C" 114 130
MISO rise/fall time, weak driver mode - "D" 1 4
MISO data disable lag time - "E" 20 32
Table 13: ZED-F9P SPI timings @ 2pF load
Timing value @ 20 pF load Min (ns) Max (ns)
MISO data valid time (CS) - "A" 19 52
MISO data valid time (SCK) weak driver mode - "B" 25 51
MISO data hold time - "C" 117 137
MISO rise/fall time, weak driver mode - "D" 6 16
MISO data disable lag time - "E" 20 32
Table 14: ZED-F9P SPI timings @ 20pF load
Timing value @ 60 pF load Min (ns) Max (ns)
MISO data valid time (CS) - "A" 29 79
MISO data valid time (SCK) weak driver mode - "B" 35 78
MISO data hold time - "C" 122 152
MISO rise/fall time, weak driver mode - "D" 15 41
MISO data disable lag time - "E" 20 32
Table 15: ZED-F9P SPI timings @ 60pF load
5.3 Slave I2C interface
An I2C compliant DDC interface is available for communication with an external host CPU. The
interface can be operated in slave mode only. The DDC protocol and electrical interface are fully
compatible with Fast-Mode of the I2C industry standard. Since the maximum SCL clock frequency