Datasheet

Table 2-2. AC Parameters: All I/O Interfaces
Parameter Symbol Direction Min Typ Max Unit Conditions
Power-Up
Delay
(2)
t
PU
To Crypto
Authentication
100 — — µs Minimum time between V
CC
> V
CC
min prior to start of t
WLO
.
Wake Low
Duration
t
WLO
To Crypto
Authentication
60 — — µs
Wake High
Delay to Data
Comm
t
WHI
To Crypto
Authentication
1500 — — µs SDA should be stable high for this
entire duration unless polling is
implemented. SelfTest is not enabled
at power-up.
Wake High
Delay when
SelfTest is
Enabled
t
WHIST
To Crypto
Authentication
20 — — ms SDA should be stable high for this
entire duration unless polling is
implemented.
High Side
Glitch Filter at
Active
t
HIGNORE_A
To Crypto
Authentication
45
(1)
— — ns Pulses shorter than this in width will
be ignored by the device, regardless
of its state when active.
Low Side
Glitch Filter at
Active
t
LIGNORE_A
To Crypto
Authentication
45
(1)
— — ns Pulses shorter than this in width will
be ignored by the device, regardless
of its state when active.
Low Side
Glitch Filter at
Sleep
t
LIGNORE_S
To Crypto
Authentication
15
(1)
— — µs Pulses shorter than this in width will
be ignored by the device when in
Sleep mode.
Watchdog
Timeout
t
WATCHDOG
To Crypto
Authentication
0.7 1.3 1.7 s Time from wake until device is forced
into Sleep mode if Config.ChipMode.
<2> is 0.
7.6 13 17 s Watchdog time : Config.ChipMode.
<2> is 0.
Note:
1. These parameters are characterized, but not production tested.
2. The power-up delay will be significantly longer if Power-On self test is enabled in the configuration
zone.
ATECC608A
Electrical Characteristics
© 2018 Microchip Technology Inc.
Datasheet Summary
DS40001977B-page 7