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Table Of Contents

ATECC608A

CryptoAuthentication™ Device Summary Datasheet

Features

• Cryptographic Co-Processor with Secure Hardware-Based Key Storage:

– Protected storage for up to 16 keys, certificates or data

• Hardware Support for Asymmetric Sign, Verify, Key Agreement:

– ECDSA: FIPS186-3 Elliptic Curve Digital Signature

– ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman

– NIST Standard P256 Elliptic Curve Support

• Hardware Support for Symmetric Algorithms:

– SHA-256 & HMAC Hash including off-chip context save/restore

– AES-128: Encrypt/Decrypt, Galois Field Multiply for GCM

• Networking Key Management Support:

– Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3

– Ephemeral key generation and key agreement in SRAM

– Small message encryption with keys entirely protected

• Secure Boot Support:

– Full ECDSA code signature validation, optional stored digest/signature

– Optional communication key disablement prior to secure boot

– Encryption/Authentication for messages to prevent on-board attacks

• Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG)

• Two High-Endurance Monotonic Counters

• Unique 72-Bit Serial Number

• Two Interface Options Available:

– High-speed Single Pin Interface with One GPIO Pin

– 1 MHz Standard I

C Interface

• 1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage

• <150 nA Sleep Current

• 8-pad UDFN and 8-lead SOIC

• Die-on-Tape and Reel for Qualified Customers (Contact Microchip Sales)

Applications

• IoT network endpoint key management & exchange

• Encryption for small messages and PII data

• Secure Boot and Protected Download

• Ecosystem Control, Anti-cloning

This is a summary document. A

complete document is available under

NDA. For more information, please

contact your local Microchip sales

office.

Datasheet Summary

DS40001977B-page 1

Summary of content (28 pages)

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This is a summary document. A complete document is available under NDA. For more information, please contact your local Microchip sales office.
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ATECC608A Pin Configuration and Pinouts Table 1. Pin Configuration Pin Function NC No Connect GND Ground SDA Serial Data SCL Serial Clock Input VCC Power Supply Figure 1. Pinouts © 2018 Microchip Technology Inc.
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Table of Contents Features.......................................................................................................................... 1 Applications..................................................................................................................... 1 Pin Configuration and Pinouts.........................................................................................2 1. Introduction..............................................................................................
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ATECC608A Introduction 1. Introduction 1.1 Applications The ATECC608A is a member of the Microchip CryptoAuthentication™ family of high-security cryptographic devices which combine world-class hardware-based key storage with hardware cryptographic accelerators to implement various authentication and encryption protocols.
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ATECC608A Introduction standard Serial EEPROM; however, these can be easily copied with no way for the host to know if the serial number is authentic or if it is a clone. The ATECC608A features a wide array of defense mechanisms specifically designed to prevent physical attacks on the device itself, or logical attacks on the data transmitted between the device and the system. Hardware restrictions on the ways in which keys are used or generated provide further defense against certain styles of attack. 1.
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ATECC608A Electrical Characteristics 2. Electrical Characteristics 2.1 Absolute Maximum Ratings Operating Temperature -40°C to +85°C Storage Temperature -65°C to +150°C Maximum Operating Voltage 6.0V DC Output Current 5.0 mA Voltage on any pin -0.5V to (VCC + 0.5V) -0.5V to (VCC + 0.5V) ESD Ratings: Human Body Model(HBM) ESD >4kV Charge Device Model(CDM) ESD >1kV Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
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ATECC608A Electrical Characteristics Table 2-2. AC Parameters: All I/O Interfaces Parameter Symbol Direction Min Typ Max Unit Conditions Power-Up Delay(2) tPU To Crypto Authentication 100 — — µs Wake Low Duration tWLO To Crypto Authentication 60 — — µs Wake High Delay to Data Comm tWHI To Crypto Authentication 1500 — — µs SDA should be stable high for this entire duration unless polling is implemented. SelfTest is not enabled at power-up.
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ATECC608A Electrical Characteristics 2.3.1 AC Parameters: Single-Wire Interface Figure 2-2. AC Timing Diagram: Single-Wire Interface Logic Ø tSTART tZHI tZLO tBIT Logic 1 tSTART tTURNAROUND SDA tSTART tSTART Table 2-3. AC Parameters: Single-Wire Interface Unless otherwise specified, applicable from TA = -40°C to +85°C, VCC = +2.0V to +5.5V, CL = 100 pF.
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ATECC608A Electrical Characteristics ...........continued Parameter Symbol Turn Around Delay Direction tTURNAROUND IO Timeout tTIMEOUT Min. Typ. Max. Unit Conditions From Crypto Authentication 64 96 131 µs ATECC608A will initiate the first low going transition after this time interval following the initial falling edge of the start pulse of the last bit of the transmit flag.
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ATECC608A Electrical Characteristics ...........continued Parameter Symbol Min. Max. Units Stop Setup Time tSU.STO 250 — ns Data In Setup Time tSU.DAT 100 — ns Data In Hold Time tHD.DAT 0 — ns Input Rise Time (1) tR — 300 ns Input Fall Time (1) tF — 100 ns Clock Low to Data Out Valid tAA 50 550 ns Data Out Hold Time tDH 50 — ns tTIMEOUT 25 75 ms tBUF 500 — ns SMBus Timeout Delay Time bus must be free before a new transmission can start (1) Note: 1.
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ATECC608A Electrical Characteristics ...........continued Parameter 2.4.1 Symbol Min. Typ. Max. Unit Conditions Output Low Voltage VOL — — 0.4 V When device is in active mode, VCC = 2.5 to 5.5V Output Low Current IOL — — 4 mA When device is in active mode, VCC = 2.5 to 5.5V, VOL = 0.
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ATECC608A Electrical Characteristics Figure 2-4. VIH and VIL in Sleep and Idle Mode When a common voltage is used for the ATECC608A VCC pin and the input pull-up resistor, then the TTLenable bit should be set to a one, which permits the input thresholds to track the supply as shown in Figure 2-5. © 2018 Microchip Technology Inc.
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ATECC608A Electrical Characteristics Figure 2-5. VIH and VIL When Active and TTLenable = 1 on All I/O Interfaces 2.9 2.4 VIN (V) 1.9 1.4 0.9 VIH_Act VIL_Act 0.4 2 2.5 3 3.5 4 4.5 5 5.5 VCC (V) © 2018 Microchip Technology Inc.
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ATECC608A Compatibility 3. Compatibility 3.1 Microchip ATECC508A The ATECC608A is designed to be fully compatible with the ATECC508A devices with the limited exception of the functions listed below. If the ATECC608A is properly configured, software written for the ATECC508A should work with the ATECC608A without any required changes, again with the exception of the functions listed below.
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ATECC608A Compatibility 3.2 Microchip ATSHA204A, ATECC108A The ATECC608A is generally compatible with all ATSHA204/A and ATECC108/A devices. If properly configured, it can be used in most situations where these devices are currently employed. For ATSHA204A and ATECC108A compatibility restrictions, see the ATECC508A data sheet. © 2018 Microchip Technology Inc.
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ATECC608A Package Marking Information 4. Package Marking Information As part of Microchip’s overall security features, the part mark for all crypto devices is intentionally vague. The marking on the top of the package does not provide any information as to the actual device type or the manufacturer of the device. The alphanumeric code on the package provides manufacturing information and will vary with assembly lot. The packaging mark should not be used as part of any incoming inspection procedure.
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ATECC608A Package Drawings R 5. Package Drawings 5.1 8-lead SOIC 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] Atmel Legacy Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2X 0.10 C A–B D A D NOTE 5 N E 2 E1 2 E1 E NOTE 1 2 1 e B NOTE 5 NX b 0.25 C A–B D TOP VIEW 0.10 C C A A2 SEATING PLANE 8X A1 SIDE VIEW 0.10 C h R0.13 h R0.13 H SEE VIEW C VIEW A–A 0.
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R ATECC608A Package Drawings 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] Atmel Legacy Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
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R ATECC608A Package Drawings 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] Atmel Legacy Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging SILK SCREEN C Y1 X1 E RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 MIN MILLIMETERS NOM 1.27 BSC 5.40 MAX 0.60 1.55 Notes: 1.
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ATECC608A Package Drawings 5.2 8-pad UDFN 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) E (DATUM B) NOTE 1 2X 0.10 C 1 2X 0.10 C C SEATING PLANE 2 TOP VIEW A1 0.10 C A 8X (A3) 0.10 SIDE VIEW 0.08 C C A B D2 e 2 1 2 0.10 E2 C A B K N L 8X b e BOTTOM VIEW 0.10 0.
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ATECC608A Package Drawings 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
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ATECC608A Package Drawings 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
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ATECC608A Revision History 6. Revision History Revision B (October 2018) 1. Updated Section Features by adding the Die-on-Tape package option. 2. Updated 2.3 AC Parameters: All I/O Interfaces and 2.3.1 AC Parameters: Single-Wire Interface in Section 2.3 AC Parameters: All I/O Interfaces. 3. Updated Section Product Identification System. Revision A (November 2017) Original release of the document. © 2018 Microchip Technology Inc.
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ATECC608A The Microchip Web Site Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as a means to make files and information easily available to customers.
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ATECC608A Product Identification System To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Device: ATECC608A: Cryptographic Co-processor with Secure Hardware-based Key Storage Package Options SSH 8-Lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) MAH 8-Pad 2 x 3 x 0.6 mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat NoLead Package (UDFN) W07(3) Die-on-Tape and Reel. Available to qualified customers only.
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ATECC608A Note: 1. Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 2. Small form-factor packaging options may be available. Please check http://www.microchip.com/ packaging for small-form factor package availability, or contact your local Sales Office. 3.
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ATECC608A SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A.
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