Datasheet

Table Of Contents
Electrical characteristics STM32F405xx, STM32F407xx
152/202 DocID022152 Rev 8
Figure 61. Synchronous non-multiplexed PSRAM write timings
Table 82. Synchronous non-multiplexed PSRAM write timings
(1)(2)
1. C
L
= 30 pF.
2. Guaranteed by characterization.
Symbol Parameter Min Max Unit
t
w(CLK)
FSMC_CLK period 2T
HCLK
-ns
t
d(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x=0..2) - 1 ns
t
d(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x= 0…2) 1 - ns
t
d(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low - 7 ns
t
d(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high 6 - ns
t
d(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x=16…25) - 0 ns
t
d(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x=16…25) 6 - ns
t
d(CLKL-NWEL)
FSMC_CLK low to FSMC_NWE low - 1 ns
t
d(CLKL-NWEH)
FSMC_CLK low to FSMC_NWE high 2 - ns
t
d(CLKL-Data)
FSMC_D[15:0] valid data after FSMC_CLK low - 3 ns
t
d(CLKL-NBLH)
FSMC_CLK low to FSMC_NBL high 3 - ns
t
su(NWAIT-CLKH)
FSMC_NWAIT valid before FSMC_CLK high 4 - ns
t
h(CLKH-NWAIT)
FSMC_NWAIT valid after FSMC_CLK high 0 - ns
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