Datasheet

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STM32F405xx, STM32F407xx Electrical characteristics
Table 15. Limitations depending on the operating power supply range
Operating
power
supply
range
ADC
operation
Maximum
Flash
memory
access
frequency
with no wait
state
(f
Flashmax
)
Maximum Flash
memory access
frequency
with wait
states
(1) (2)
I/O operation
Clock output
Frequency on
I/O pins
Possible
Flash
memory
operations
V
DD
=1.8 to
2.1 V
(3)
Conversion
time up to
1.2 Msps
20 MHz
(4)
160 MHz with 7
wait states
– Degraded
speed
performance
– No I/O
compensation
up to 30 MHz
8-bit erase
and program
operations
only
V
DD
= 2.1 to
2.4 V
Conversion
time up to
1.2 Msps
22 MHz
168 MHz with 7
wait states
– Degraded
speed
performance
– No I/O
compensation
up to 30 MHz
16-bit erase
and program
operations
V
DD
= 2.4 to
2.7 V
Conversion
time up to
2.4 Msps
24 MHz
168 MHz with 6
wait states
– Degraded
speed
performance
–I/O
compensation
works
up to 48 MHz
16-bit erase
and program
operations
V
DD
= 2.7 to
3.6 V
(5)
Conversion
time up to
2.4 Msps
30 MHz
168 MHz with 5
wait states
– Full-speed
operation
–I/O
compensation
works
–up to
60 MHz
when V
DD
=
3.0 to 3.6 V
–up to
48 MHz
when V
DD
=
2.7 to 3.0 V
32-bit erase
and program
operations
1. It applies only when code executed from Flash memory access, when code executed from RAM, no wait state is required.
2. Thanks to the ART accelerator and the 128-bit Flash memory, the number of wait states given here does not impact the
execution speed from Flash memory since the ART accelerator allows to achieve a performance equivalent to 0 wait state
program execution.
3. V
DD
/VDDA minimum value of 1.7 V is obtained when the device operates in reduced temperature range, and with the use
of an external power supply supervisor (refer to Section : Internal reset OFF).
4. Prefetch is not available. Refer to AN3430 application note for details on how to adjust performance and power.
5. The voltage range for OTG USB FS can drop down to 2.7 V. However it is degraded between 2.7 and 3 V.