Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
146/202 DocID022152 Rev 8
Figure 57. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 78. Asynchronous multiplexed PSRAM/NOR write timings
(1)(2)
1. C
L
= 30 pF.
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 4T
HCLK
–0.5 4T
HCLK
+3 ns
t
v(NWE_NE)
FSMC_NEx low to FSMC_NWE low T
HCLK
–0.5 T
HCLK
-0.5 ns
t
w(NWE)
FSMC_NWE low tim e 2T
HCLK
–0.5 2T
HCLK
+3 ns
t
h(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time T
HCLK
-ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid - 0 ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low 1 2 ns
t
w(NADV)
FSMC_NADV low time T
HCLK
– 2 T
HCLK
+ 1 ns
t
h(AD_NADV)
FSMC_AD(address) valid hold time after
FSMC_NADV high)
T
HCLK
–2 - ns
t
h(A_NWE)
Address hold time after FSMC_NWE high T
HCLK
-ns
t
h(BL_NWE)
FSMC_BL hold time after FSMC_NWE high T
HCLK
–2 - ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 1.5 ns
t
v(Data_NADV)
FSMC_NADV high to Data valid - T
HCLK
–0.5 ns
t
h(Data_NWE)
Data hold time after FSMC_NWE high T
HCLK
-ns
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