Datasheet

DocID022152 Rev 8 143/202
STM32F405xx, STM32F407xx Electrical characteristics
Figure 54. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 75. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
(1)(2)
1. C
L
= 30 pF.
2. Guaranteed by characterization.
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 2T
HCLK
–0.5 2 T
HCLK
+1 ns
t
v(NOE_NE)
FSMC_NEx low to FSMC_NOE low 0.5 3 ns
t
w(NOE)
FSMC_NOE low time 2T
HCLK
–2 2T
HCLK
+ 2 ns
t
h(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time 0 - ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid - 4.5 ns
t
h(A_NOE)
Address hold time after FSMC_NOE high 4 - ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 1.5 ns
t
h(BL_NOE)
FSMC_BL hold time after FSMC_NOE high 0 - ns
t
su(Data_NE)
Data to FSMC_NEx high setup time T
HCLK
+4 - ns
t
su(Data_NOE)
Data to FSMC_NOEx high setup time T
HCLK
+4 - ns
t
h(Data_NOE)
Data hold time after FSMC_NOE high 0 - ns
t
h(Data_NE)
Data hold time after FSMC_NEx high 0 - ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low - 2 ns
t
w(NADV)
FSMC_NADV low time - T
HCLK
ns
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