Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
126/202 DocID022152 Rev 8
I
2
S interface characteristics
Unless otherwise specified, the parameters given in Table 56 for the i
2
S interface are
derived from tests performed under the ambient temperature, f
PCLKx
frequency and V
DD
supply voltage conditions summarized in
Table 14, with the following configuration:
• Output speed is set to OSPEEDRy[1:0] = 10
• Capacitive load C = 30 pF
• Measurement points are done at CMOS levels: 0.5 V
DD
Refer to Section 5.3.16: I/O port characteristics for more details on the input/output alternate
function characteristics (CK, SD, WS).
Note: Refer to the I
2
S section of RM0090 reference manual for more details on the sampling
frequency (F
S
). f
MCK
, f
CK
, and D
CK
values reflect only the digital peripheral behavior. The
value of these parameters might be slightly impacted by the source clock accuracy. D
CK
depends mainly on the value of ODD bit. The digital contribution leads to a minimum value
of I2SDIV / (2 x I2SDIV + ODD) and a maximum value of (I2SDIV + ODD) / (2 x I2SDIV +
ODD). F
S
maximum value is supported for each mode/condition.
Table 56. I
2
S dynamic characteristics
(1)
Symbol Parameter Conditions Min Max Unit
f
MCK
I
2
S main clock output -
256 x
8K
256 x F
S
(2)
MHz
f
CK
I
2
S clock frequency
Master data: 32 bits - 64 x F
S
MHz
Slave data: 32 bits - 64 x F
S
D
CK
I
2
S clock frequency duty cycle Slave receiver 30 70 %
t
v(WS)
WS valid time Master mode 0 6
ns
t
h(WS)
WS hold time Master mode 0 -
t
su(WS)
WS setup time Slave mode 1 -
t
h(WS)
WS hold time Slave mode 0 -
t
su(SD_MR)
Data input setup time
Master receiver 7.5 -
t
su(SD_SR)
Slave receiver 2 -
t
h(SD_MR)
Data input hold time
Master receiver 0 -
t
h(SD_SR)
Slave receiver 0 -
t
v(SD_ST)
t
h(SD_ST)
Data output valid time
Slave transmitter (after enable edge) - 27
t
v(SD_MT)
Master transmitter (after enable edge) - 20
t
h(SD_MT)
Data output hold time Master transmitter (after enable edge) 2.5 -
1. Guaranteed by characterization.
2. The maximum value of 256 x F
S
is 42 MHz (APB1 maximum frequency).