Datasheet

QuickLogic EOS S3 Ultra Low Power multicore MCU datasheet - Version 3.3d 27-129
© 2020 QuickLogic Corporation www.quicklogic.com 99
IO_40 IO VCCIOB -- D2 13 SPI_MASTER_SSn1,
FBIO_40, SCL_2,
DEBUG_MON_5,
IrDA_SIRIN,
SENSOR_INT_3
IO_41 IO VCCIOB -- F1 14 FBIO_41, SDA_2,
DEBUG_MON_6,
IrDA_SIROUT,
SENSOR_INT_6
IO_42 IO VCCIOB -- H1 10 FBIO_42, SDA_1_DPU,
DEBUG_MON_7, SWV,
SENSOR_INT_7
IO_43 IO VCCIOB D7 D1 7 FBIO_43,
AP_INTERRUPT
IO_44 IO VCCIOB E7 E1 8 FBIO_44, SW_DP_IO,
SDA_1, UART_TXD,
IrDA_SIRIN,
SENSOR_INT_4
IO_45 IO VCCIOB F7 G1 9 FBIO_45, SW_DP_CLK,
SCL_1, UART_RXD,
IrDA_SIROUT, GPIO(7),
SENSOR_INT_5
STM INPUT VCCIOB D4 E5 29 Connect to ground
SYS_RSTn INPUT VCCIOB F1 F8 41 System Reset Input
VCCIOA POWER C6 C2 1, 58 Bank A VCC In
VCCIOB POWER D6 E4, E6 12, 24,
35
Bank B VCC In
VDD1 POWER A2 B7 49 LDO 1 Output
VDD2 POWER A3 B6 51 LDO 2 Output
a. Each of the 46 multi-function IOs can be used as on-chip programmable logic (FB) IOs. Each IO is assigned a
corresponding FBIO function. For more information, see Fabric Inputs/Outputs (FBIOs) .
b. M4-F can only control total of 8 IO pads as GPIOs out of the 46 multi-function IOs. For example, M4-F can control
GPIO bit 0 on either IO_6 or IO_24. M4-F can control GPIO bit 1 on either IO_9 or IO_26, etc. Only 1 IO can be selected
for each GPIO. Both IOs cannot be selected at the same time. Look at the Alternate Function column to see which
IOs can be used as GPIOs. For more information, see General Purpose Inputs/Outputs (GPIOs) .
c. The QFN pinout information is provided as reference for QuickFeather board only. The QFN package is not in mass
production.
I/O State
The following table lists the default state of the I/Os before and after SYS_RST_N release when all supply rails have
reached 90% of level. The I/O states are driven as output if the VCCIO supply is powered up before the VDD core supply.
Table 32: I/O State
IO VCCIO
Bank
WLCSP Ball BGA Ball SYS_RST_N = 0 SYS_RST_N = 1
IO<0> VCCIO<A> A7 B1 PU PU
IO<1> VCCIO<A> B7 C1 PU PU