Datasheet

QuickLogic EOS S3 Ultra Low Power multicore MCU datasheet - Version 3.3d 27-129
© 2020 QuickLogic Corporation www.quicklogic.com 64
20 32x8K SRAM Instance 12 On Yes Yes
21 32x8K SRAM Instance 13 On Yes Yes
22 32x8K SRAM Instance 14 On Yes Yes
23 32x8K SRAM Instance 15 On Yes Yes
24 Audio – DMA (AD0) Off Yes No
25 Audio – PDM Left (AD1) Off Yes No
26 Audio – PDM Right (AD2) Off Yes No
27 Audio – LPSD (AD3) Off Yes No
28
Audio – I
2
S (AD4)
Off Yes No
29 Audio – TOP (AD5) Off Yes No
30 Always-On On No No
31 eFuse On Yes No
SRAM Power Domains
There are 16 32-KByte SRAM instances and the power domain of each instance can be controlled independently. Other
SRAM instances do not include independently controlled power domains; their power domain is bonded with the logic
block on which they reside. Additionally, the 16 32-KByte SRAM instances utilize auto wakeup logic, which allows the
SRAM to be in a shut down or deep sleep state when it is not in use.
NOTE: The EOS S3 platform software puts the SRAM into sleep when it is not in use.
The SRAM instances on FFE and Packet FIFO Bank (PKFB) are on the corresponding retention power supply/domain. For
other SRAM instances (such as Audio), they are on the corresponding ON/OFF domain. For details, see the following
figure. Each SRAM memory instance itself can also support deep sleep and shut down modes for additional power savings.
Table 10: Memory Domains
SRAM Power Domain Size of SRAM Macro Power Supply Net
PKFB SRAM 0.25Kx32 Retention Power for PKFB
0.25Kx32
0.5Kx32
4Kx17
FFE SRAM CM 2Kx40 Retention Power for FFE
CM 8Kx40
DM 4 1Kx32
SM0 1Kx18
SM1 0.5Kx18
PDM Left SRAM L0 2Kx32 Main Power for Audio AD1
L1 128x32
L2 256x16
PDM Right SRAM R0 2Kx32 Main Power for Audio AD2
R1 128x32
R2 256x16