Datasheet

QuickLogic EOS S3 Ultra Low Power multicore MCU datasheet - Version 3.3d 27-129
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• SPI Slave
The following sections describe each of these interfaces.
3.5.1. SPI Master for System Support
IP within the on-chip programmable logic can directly access the SPI Master for system support interface. The following
figure shows this connection.
Figure 12: On-Chip Programmable Logic IP Access to SPI Master for System Support
AHB-to-APB Bridge
SPI Master Interface
SPI Master Module
Boot Flash, External Sensors, etc.
Host Application Processor/M4
FPGA Fabric
Configuration
State Machine
Configuration
DMA
Configuration Logic
The ability to directly access the SPI Master provides an IP designer with the option to create on-chip programmable logic
IP that can directly access external devices such as Flash Memory or Sensors. In the latter case, the Sensor data values
can be used for additional Sensor Fusion operations in parallel with the Sensor Processing Subsystem. In such cases, the
on-chip programmable logic IP can use either the Packet FIFO Interface or use the SDMA to move the processed data
into the EOS S3 platform for further evaluation or processing.
During the initial boot operation, the SPI Master is exclusively accessed by the Configuration Logic. Once the
Configuration Logic completes the initial boot operation, the SPI Master becomes available to the M4-F for additional
data retrieval from the external flash device. More specifically, the initial boot code provides a boot loader to the M4-F for
the M4-F to complete its retrieval of M4-F code.
After the boot process is completed, either the M4-F or on-chip programmable logic can access the SPI Master Interface
and use this to access any device on the SPI bus. This can be additional external flash devices, sensors, or system support
devices such as Power Management devices.
3.5.2. SPI Master for System Support Features
The SPI Master interface supports the following operations:
• Single SPI transfers
• DMA transfers of SPI data retrieved from an external flash device. The following features show the operation
of this module.