Datasheet

© 2020 QuickLogic Corporation www.quicklogic.com 15
1. Functional Overview
The QuickLogic
®
EOS
™
S3 platform is a multi-core, ultra-low power sensor processing system designed for mobile market
applications such as smartphone, wearable, and Internet of Things (IoT) devices. The core of the EOS S3 platform is its
proprietary µDSP-like Flexible Fusion Engine (FFE). To complement the FFE, the EOS S3 platform also includes a Cortex
M4-F subsystem that enables higher level, general purpose processing.
This multi-core architecture enables smartphone application processors to offload real-time, always-on sensor
computational requirements to the EOS S3 platform. The multi-core approach and multiple power islands allow the EOS
S3 platform to process sensor data and run sensor fusion algorithms in the most efficient manner possible for both
processing and power.
EOS S3 Ultra Low Power multicore MCU Platform
Architecture
The following figure shows a system level architecture diagram that highlights the major functional blocks of the EOS S3
Ultra Low Power multicore MCU platform. More detailed block diagrams are provided later in this data sheet that
highlights the available datapath options, clock and power domain partitions.
Figure 1: EOS S3 Ultra Low Power multicore MCU Platform Architecture
RTC
Clocks
LDO
ADC
ARM Cortex M4-F SRAM
SPI Slave
SPI Master
UART
DMA and FIFOs eFPGA
Low Power
Sound Detector
I2S
PDM to PCM
PDM
Flexible
Fusion
Engine
Sensor
Manager
I2C/SPI
I2C