Datasheet

QuickLogic EOS S3 Ultra Low Power multicore MCU datasheet - Version 3.3d 27-129
© 2020 QuickLogic Corporation www.quicklogic.com 10
Figure 49: Bootstrap Timing ............................................................................................................ 82
Figure 50: PKFB Block Diagram ..................................................................................................... 84
Figure 51: System DMA Block Diagram .......................................................................................... 86
Figure 52: System DMA Interface ................................................................................................... 87
Figure 53: ADC Block Diagram ....................................................................................................... 88
Figure 54: Example Voltage Divider Circuit ..................................................................................... 90
Figure 55: Timer Block Diagram ...................................................................................................... 92
Figure 56: 1 ms Count and 1 ms Counter Relationship ................................................................... 93
Figure 57: PMU and FFE Timing Waveform ................................................................................... 94
Figure 58: Example of a Smartphone or High-Level Operating System Wearable Design ............ 109
Figure 59: Example of a Real-Time Operating System Wearable Design ..................................... 110
Figure 60: 42-Ball WLCSP Package Drawing ............................................................................... 111
Figure 61: 64-Ball BGA Package Drawing .................................................................................... 112
Figure 62: 64-Pin QFN Package Drawing ..................................................................................... 113
Figure 63: Pb-Free Component Preconditioning Reflow Profile..................................................... 114