User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 79 of 909 2019 Ambiq Micro, Inc.
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3.5.3.1.2 PWRCTRL Registers
3.5.3.1.2.1SUPPLYSRC Register
Voltage Regulator Select Register
OFFSET: 0x00000000
INSTANCE 0 ADDRESS: 0x40021000
This register controls the enable for BLE BUCK.
3.5.3.1.2.2SUPPLYSTATUS Register
Voltage Regulators status
OFFSET: 0x00000004
INSTANCE 0 ADDRESS: 0x40021004
Provides an indicator for the BLE BUCK and SIMO BUCK status. Once the SIMO BUCK is powered up
MEM and CORE LDOs are disabled.
Table 7: SUPPLYSRC Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
BLEBUCKEN
Table 8: SUPPLYSRC Register Bits
Bit Name Reset RW Description
31:1 RSVD 0x0 RO
RESERVED.
0 BLEBUCKEN 0x0 RW
Enables and Selects the BLE Buck as the supply for the BLE power domain
or for Burst LDO. It takes the initial value from Customer INFO space. Buck
will be powered up only if there is an active request for BLEH domain or
Burst mode and appropriate feature is allowed.
EN = 0x1 - Enable the BLE Buck.
DIS = 0x0 - Disable the BLE Buck.