User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 763 of 909 2019 Ambiq Micro, Inc.
All rights reserved.
DMASTAT Register
DMA Status Register
OFFSET: 0x00000290
INSTANCE 0 ADDRESS: 0x50010290
DMA Status Register
Table 1124: DMATARGADDR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
UTARGADDR LTARGADDR
Table 1125: DMATARGADDR Register Bits
Bit Name Reset RW Description
31:19 UTARGADDR 0x400 RO
SRAM Target
18:0 LTARGADDR 0x0 RW
DMA Target Address
Table 1126: DMASTAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
DMAERR
DMACPL
DMATIP
Table 1127: DMASTAT Register Bits
Bit Name Reset RW Description
31:3 RSVD 0x0 RO
RESERVED.
2 DMAERR 0x0 RW
DMA Error
1DMACPL 0x0RW
DMA Transfer Complete
0DMATIP 0x0RW
DMA Transfer In Progress