User Manual
Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 740 of 909 2019 Ambiq Micro, Inc.
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SWT Register
Software trigger
OFFSET: 0x00000008
INSTANCE 0 ADDRESS: 0x50010008
This register enables initiating an ADC scan through software.
SL0CFG Register
Slot 0 Configuration Register
Table 1078: STAT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
PWDSTAT
Table 1079: STAT Register Bits
Bit Name Reset RW Description
31:1 RSVD 0x0 RO
RESERVED.
0PWDSTAT 0x0RO
Indicates the power-status of the ADC.
ON = 0x0 - Powered on.
POWERED_DOWN = 0x1 - ADC Low Power Mode 1.
Table 1080: SWT Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD SWT
Table 1081: SWT Register Bits
Bit Name Reset RW Description
31:8 RSVD 0x0 RO
RESERVED.
7:0 SWT 0x0 RW
Writing 0x37 to this register generates a software trigger.
GEN_SW_TRIGGER = 0x37 - Writing this value generates a software trig-
ger.