User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 732 of 909 2019 Ambiq Micro, Inc.
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limits value to match the corresponding precision mode format for the enabled slots through the
ADCSCWLIM register.
18.3 Operating Modes and the Mode Controller
The mode controller of Figure 89 is a sophisticated state machine that manages not only the time slot
conversions but also the power state of the ADC analog components and the hand shake with the clock
generator to start the HFRC clock source if required. Thus once the various control registers are initialized,
the core can go to sleep and only wake up when there are valid samples in the FIFO for the interrupt
service routine to distribute. Firmware does not have to keep track of which block is using the HFRC clock
source since the devices in conjunction with the clock generator manage this automatically. The ADC
block’s mode controller participates in this clock management protocol.
From a firmware perspective, the ADC mode controller is controlled from bit fields in the ADC configuration
register and from the various bit fields in the eight slot configuration registers.
The most over-riding control is the ADC enable bit in the PWR_CTRL_DEVICE_EN register of the power
control block. This bit must be set to '1' to enable power to the ADC subsystem. Furthermore, the ADCEN
bit in the ADC configuration register is a global functional enable bit for general ADC operation. Setting this
bit to zero has many of the effects of a software reset, such as reseting the FIFO pointers. Setting this bit to
one enables the mode controller to examine its inputs and proceed to autonomously handle analog to
digital conversions.
An ADC scan is the process of sampling the analog voltages at each input of the ADC of Figure 89
following a trigger event. If the ADC is enabled and one or more slots are enabled, a scan is initiated after
the ADC receives a trigger through one of the configured trigger sources. The scan flowchart diagram can
be found in Figure 90
An ADC conversion is the process of averaging measurements following one or more scans for each slot
that is enabled.