User Manual

Apollo3 Blue Datasheet

DS-A3-0p9p1 Page 698 of 909 2019 Ambiq Micro, Inc.

16. Reset Generator Module

Figure 86. Block diagram for the Reset Generator Module

16.1 Functional Overview

The Reset Generator Module (RSTGEN) monitors a variety of reset signals and asserts the active low

system reset (SYSRESETn) accordingly. A reset causes the entire system to be re-initialized, and the

cause of the most recent reset is indicated by the STAT register.

Reset sources are described in the subsequent sections and include:

• External reset pin (RSTn)

• Power-on event

• Brown-out events

• Software request (SYSRESETREQn)

• Watchdog expiration

16.2 External Reset Pin

The active-low RSTn pin can be used to generate a reset using an off-chip component (e.g., a push-

button). An internal pull-up resistor in the RSTn pad enables optional floating of the RSTn pin, and a de-

bounce circuit ensures that bounceglitches on RSTn doesnot cause unintentional resets. The RSTn pin is

not maskable. An internal pull-down device will be active during a brownout event pulling the RSTn pin low.

See Figure 87

RSTn

PORn

2.1 VBODn

SYSRESETREQn

WDTRn

SYSRESETn

1.8 VBODn

Power-on Detector

Brown-out Detector

OCPc

VDDCORE Over-current Protection

OCPf

VDDMEM Over-current Protection

BODb

VDDBLE Brown-out Detector