User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 688 of 909 2019 Ambiq Micro, Inc.
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14.2.2.23STMINTSET Register
STIMER Interrupt registers: Set
OFFSET: 0x0000030C
INSTANCE 0 ADDRESS: 0x4000830C
Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for
testing purposes).
4COMPAREE 0x0RW
COUNTER is greater than or equal to COMPARE register E.
COMPARED = 0x1 - COUNTER greater than or equal to COMPARE regis-
ter.
3COMPARED 0x0RW
COUNTER is greater than or equal to COMPARE register D.
COMPARED = 0x1 - COUNTER greater than or equal to COMPARE regis-
ter.
2COMPAREC 0x0RW
COUNTER is greater than or equal to COMPARE register C.
COMPARED = 0x1 - COUNTER greater than or equal to COMPARE regis-
ter.
1COMPAREB 0x0RW
COUNTER is greater than or equal to COMPARE register B.
COMPARED = 0x1 - COUNTER greater than or equal to COMPARE regis-
ter.
0COMPAREA 0x0RW
COUNTER is greater than or equal to COMPARE register A.
COMPARED = 0x1 - COUNTER greater than or equal to COMPARE regis-
ter.
Table 998: STMINTSET Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
CAPTURED CAPTUREC
CAPTUREB CAPTUREA
OVERFLOW
COMPAREH
COMPAREG
COMPAREF
COMPAREE
COMPARED COMPAREC
COMPAREB COMPAREA
Table 999: STMINTSET Register Bits
Bit Name Reset RW Description
31:13 RSVD 0x0 RO
RESERVED.
12 CAPTURED 0x0 RW
CAPTURE register D has grabbed the value in the counter
CAPD_INT = 0x1 - Capture D interrupt status bit was set.
Table 997: STMINTCLR Register Bits
Bit Name Reset RW Description