User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 674 of 909 2019 Ambiq Micro, Inc.
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14.2.2.2 STTMR Register
System Timer Count Register (Real Time Counter)
OFFSET: 0x00000144
INSTANCE 0 ADDRESS: 0x40008144
The COUNTER Register contains the running count of time as maintained by incrementing for every rising
clock edge of the clock source selected in the configuration register. It is this counter value that captured in
the capture registers and it is this counter value that is compared against the various compare registers.
This register cannot be written, but can be cleared to 0 for a deterministic value. Use the FREEZE bit will
stop this counter from incrementing.
14.2.2.3 CAPTURECONTROL Register
Capture Control Register
OFFSET: 0x00000148
INSTANCE 0 ADDRESS: 0x40008148
The STIMER Capture Control Register controls each of the 4 capture registers. It selects their GPIO pin
number for a trigger source, enables a capture operation and sets the input polarity for the capture. NOTE:
8-bit writes can control individual capture registers atomically.
Table 956: STTMR Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
STTMR
Table 957: STTMR Register Bits
Bit Name Reset RW Description
31:0 STTMR 0x0 RO
Value of the 32-bit counter as it ticks over.
Table 958: CAPTURECONTROL Register
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
RSVD
CAPTURE3 CAPTURE2 CAPTURE1 CAPTURE0