User Manual

Apollo3 Blue Datasheet
DS-A3-0p9p1 Page 670 of 909 2019 Ambiq Micro, Inc.
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The heart of the STIMER is a single 32-bit counter that keeps track of current time for the application
running on the Apollo3 Blue MCU. This counter is reset at the actual power cycle reset of the MCU. It is
generally never reset or changed again. Up to eight 32-bit comparator registers can be loaded each of
which can generate an interrupt signal to the NVIC. Comparators A through H generate interrupt A through
H while capture registers A through D and the overflow event generate interrupt I, all the way to the NVIC.
Thus the scheduler can run these 9 interrupts at different priorities in the NVIC.
The comparator interrupts are each used to schedule a function (task) to run for the application. Thus
these tasks run on interrupt levels at priorities lower than the I/O interrupts.
The overflow interrupt allows firmware to keep track of real time beyond that maintained in the 32-bit timer.
14.2 STIMER Registers
System Timer
INSTANCE 0 BASE ADDRESS:0x40008000
The System Timer block contains a 32-bit counter for system timer functions. This counter is the source for
timestamping events when performing capture or compare functions.